|I realize the following feature with this CPLD.
This circuit is the flip-flop circuit which combined two NANDs.
This circuit is used for the chattering prevention of the time setting mode selector switch and the setting switch in 0 seconds.
There are 2 circuits.
This circuit decodes the binary input of 3 bits to eight signals.
This circuit is used for the selection of the digital display position.
This circuit makes the frequency of 1/200000 with the binary counter.
This circuit is used to change a 10-MHz clock into the 50-Hz clock.