please dont rip this site


Currently under discussion on the CUMP list

We have finally reached a consensus on the CUMP BUS rev. 1.0 (we've been in 0.x up until now)

Here's the 1st release revision of the CUMP bus:

CUMP Bus rev.4
IDC Pin # Signal name IDC Pin #
1 TX/BD0 BD1/RX 2
3 BD2 BD3 4
5 BD4 BD5 6
7 BD6 BD7 8
9 ICP/BD8 BD9/OCP 10
11 PP0/BD10 BD11/PP1 12
13 PP2/BD12 BD13/PP3 14
15 PP4/BD14 BD15/PP5 16
17 PP6/BD16 BD17/PP7 18
19 PCK#/BD18 BD19/RW# 20
21 ALE#/BD20 BD21/DBR 22
23 IRQ#/BD22 BD23/SDI 24
25 GND BD24/SDO 26
27 5V BD25/SCK 28
29 VIO BD26/SCL 30
31 VAR2 BD27/SDA 32
33 VAR1 BD28/VCK 34
35 IDD BD29/IDL 36
37 IDC NC 38
39 NC NC 40


VAR: Variable Voltage
VCC: Supply voltage (5V/3V?)
BD: BiDirectional signal
PP: Parallel Port signal
E: Parallel Port Enable (aka parallel port clock)
RW: Parallel Port Read/Write signal
ALE: Parallel Port Address Latch Enable
SDA: IIC Serial Data
SCL: IIC Serial Clock
SDI: SPI Serial Data In
SCK: SPI Serial Clock
SDO: SPI Serial Data Out
VCLK: Variable Clock source
TX: UART data send (MB centric)
RX: UART data receive (MB centric)
IDC: Serial ID clock
IDD: Serial ID data
IDL: Serial ID load
IRQ: Interrupt Request
NC: Not Connected


The SDA and SCL lines may have to be put on the same lines as SDI and SCK repectively depending on the design and the MCUs available.

I think I forgot that the SPI protocol requires a #SS pin (slave select) that should be reflected in the next revision.

This section will grow larger, but due to the reprecussions of editing the very core of the CUMP architecture--the CUMP bus--nothing is solid right now.

See also:

file: /Techref/piclist/cump/hardware.htm, 3KB, , updated: 2005/3/29 12:24, local time: 2024/7/23 22:02, owner: BJM-bigfoot-486,

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