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Appendix: Program listings

The following programs are intended as illustrative of the use of the commands discussed. They are certainly trivial, and probably not paragons of programming technique! In each, I have added a section called simulator: this section is a suggestion for things you might like to do during the simulation of your program. For instance, you might need to have a watch window open showing the W register and portb, as well as having the stack open too. Of course, it’s up to you how you design and code these programs, and how you experiment with them in the simulator.

Program 2: moves . asm

;moves.asm to show how MOVF, MOVWF & MOVLW work
;*********************************** simulator ***
;watch window: reg1, w, pcl
;*********************************** setup     ***
processor 16c84
reg1    equ  h'10'
;*********************************** program   ***
start:  movlw h'05'     ;load w
    movwf reg1  ;move (w) to reg1
    movlw h'82' ;change w
    movf reg1,0 ;restore w
    end

Program 3: clears . asm

    ;clears.asm to show how clrf & clrw work
    ;based on moves.asm
    ;*********************************** simulator
    ;watch window: reg1, w, pcl
    ;*********************************** setup
    processor 16c84
    reg1 equ h'10'
    ;*********************************** program
    start: 
    movlw h'05' ;load w
        movwf reg1  ;move (w) to reg1
        movlw h'82'     ;change w
        movf reg1,0     ;restore w
    clear: 
    clrf reg1   ;clear reg1
        clrw        ;clear w
        end

Program 4: arith . asm

;arith.asm to show using ADDWF, SUBWF, ADDLW, SUBLW
;************************************* simulator
;watch window: reg1,reg2,status,w,pcl
;************************************* setup
    processor 16c84
    reg1 equ h'10'
    reg2 equ h'12'
;************************************* program
loads: 
    movlw d'20'     ;load w
    movwf reg1      ;load reg1
    movlw d'80'     ;load w anew
    movwf reg2      ;load reg2
arith:
    addlw d'05'     ;add d'05' to w
    sublw d'100'    ;sub w from d'100'
    addwf reg1,1    ;add w to reg1, into reg1
    subwf reg2,1    ;sub w from reg2, into reg2
    end

Program 5: inter1.asm

;inter1.asm is a simple interrupt handler-
; it does not save the state of the machine
; nor does it determine the kind of interrupt.
;
;*********************************************simulator
;watch window: intcon, pcl
;stack: have this open too- see the return address come & go
;asynch stimulus: have a toggle on rb4
;********************************************* setup
    processor 16c84
    movlw h'0'
    movwf h'0b'     ;clear intcon
    goto main       ;hop over the isr
;********************************************** isr start
isr: 
    org h'0004'     ;interrupts always vector to here
    nop         ;here we actually do the stuff
    nop         ; of the interrupt
    bcf h'0b',0     ;clear int before going back
    retfie      ;this re-sets intcon gie
;*********************************************** isr ends
;
;*********************************************** main start
main: 
    org h'0020'     ; leave enough room for the isr!
    bsf h'0b',7     ; set global int enable
    bsf h'0b',3     ; set change on b int enable
payrol:
    nop         ; loop here until interrupted,
    nop         ; doing payroll stuff
    goto payrol     ;
    nop
    nop
    end

Program 6: inter2.asm

;inter2.asm does save the state of the machine
; but does not determine the kind of interrupt.
;
;****************************************************simulator
;watch window: intcon, pcl, portb, w, w_saved
;stack: have this open too- see the return address come & go
;asynch stimulus: have a toggle on rb4
;**************************************************** setup
    processor 16c84
    w_saved equ h'10'   ;a place to keep w
    movlw h'0'
    movwf h'0b'     ;clear intcon
    goto main       ;hop over the isr at the beginning
;**************************************************** isr start
isr:
    org h'0004'     ;interrupts always vector to here
    movwf w_saved   ;save w as it was in main
    movlw h'65'     ;do something to change w
    nop         ;do more isr stuff
    ;now, restore w: there is
    ; no "movfw"- 2 swapf's seems to be
    ; the way to do this....
    swapf w_saved,1     ; first, swap w_saved into itself
    swapf w_saved,0     ; then, swap it into w
    bcf h'0b',0     ;clear int on b before going back
    retfie      ;this re-sets intcon gie
;***************************************************** isr ends
;
;****************************************************** main start
main: 
    org h'0020'     ; leave room for the isr!
    bsf h'0b',7     ; set global int enable
    bsf h'0b',3     ; set change on b int enable
payrol: 
    nop         ; loop here until interrupted,
    nop         ; doing payroll stuff
    movlw h'0f'     ; simulate a calc by loading w
    goto payrol     ;
    nop
    nop
    end

Program 7: inter3.asm

;inter3.asm saves the state of the machine
; and determines the kind of interrupt.
;
;**************************************************simulator
;watch window: intcon, pcl, portb, w_saved, w
;stack: have this open too- see the return address come & go
;asynch stimulus: have a toggle on rb4(for rbi) and rb0(int)
;************************************************* setup
    processor 16c84
    w_saved equ h'10'   ;a place to keep w
    movlw h'0'
    movwf h'0b'     ;clear intcon
    goto main       ;hop over the isr at the beginning
;*************************************************** isr start
isr:
    org h'0004'     ;interrupts always vector to here
    movwf w_saved   ;save w as it was in main
    ;find out what kind of interrupt
    btfsc h'0b',0   ; is it an rbi?
    call _rbi       ; yes- call the rbi 'sub-handler'
    btfsc h'0b',1   ; is it an int?
    call _int       ; yes- call the int 'sub-handler'
    ;end up here after sub-handler
    ;now, restore w
    swapf w_saved,1     ; first, swap w_saved into itself
    swapf w_saved,0     ; then, swap it into w
    bcf h'0b',0     ;clear rbif before going back
    bcf h'0b',1     ;clear intf before going back
    retfie      ; this re-sets intcon gie
_rbi: 
    movlw h'65'     ;do something to change w
    return
_int: 
    movlw h'24'     ;do something different to w
    return
;***************************************************** isr ends
;
;**************************************************** main start
main:
    org h'0020'     ; leave room for the isr!
    bsf h'0b',7     ; set global int enable
    bsf h'0b',3     ; set change on b int enable
    bsf h'0b',4     ; set ext int on pin6 enable
    ; we've got 2 types of int!
payrol:
    nop         ; loop here until interrupted,
    nop         ; doing payroll stuff
    movlw h'0f'     ;simulate a calc by loading w
    goto payrol     ;
    nop
    nop
    end

Program 8: time0.asm

;time0.asm to see how timer0 works
;
;************************************ setup
    processor 16c84
    STATUS EQU H'03'
    OPTIO EQU H'81'
    tmr0 EQU H'01'
    BANK_ EQU H'05'
    T0CS EQU H'05'
    PSA EQU H'03'
    clocked equ h'10'
    INTCON equ h'0B'
    T0IE equ h'05'
    GIE EQU H'07'
    goto top
;************************************ isr
isr: 
    ORG h'0004'
    incf clocked    ;clocked is the 'wall clock'
    BCF INTCON,2
    retfie

;************************************ program
top:
    org h'0010'
    clrf tmr0       ;clear the tmr0 register
    clrf clocked
mode:
    bsf STATUS,BANK_    ;switch to page 1
    bcf OPTIO,T0CS  ;go from counter to timer
    bsf OPTIO,PSA   ;no prescaler yet
    bsf INTCON,GIE
    bsf INTCON,T0IE
loop:
    nop
    nop
    goto loop
    END

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