please dont rip this site

Ken Webster says:

After the 8th bit, the EEPROM should pull the data line low for an ACK or leave it high for NACK. The IIC bus must be pulled high with resistors (1k or 10k depending on how fast you want to go) and the PIC must only drive low (not drive high) .. open-drain outputs are ideal for this but you can achieve the same effect by seting the PORT bits low and using the TRIS bits to drive the line low or let the resistors pull it high.

I have code for a 17C756 talking to a 24C64 here: http://kdsl32.dnvr.uswest.net/cgi-bin/tl.exe/AERC/poscalc/eeprom.asm

It is commented .. I think pretty well but I haven't gotten anyone else's opinions yet.

The port initializations (after reset) are here: http://kdsl32.dnvr.uswest.net/cgi-bin/tl.exe/AERC/poscalc/init1.asm

Note that RA2 and RA3 are open-drain outputs on the 17C756, specifically designed for IIC or similar applications. On a normal output you would simply program the PORT bit low and toggle the TRIS bit in the same manner as the PORT bits are toggled in my 17C756 code.

memory@

Questions:

See also:


file: /Techref/mem/eeprom/24c64.htm, 1KB, , updated: 2003/3/31 07:07, local time: 2014/10/31 12:29,
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