|PC Port||Signal name
|base.bit||Mode: Signal Name: Meaning|
|+1.0 as strobe||nStrobe,
|Pulse width min 0.5us. Driven by 7405 inverting open collector buffers,
pulled to +5 volts via 4.7K resistors. Inverted (becomes Strobe) in Status
Input register on PC port.
Must be high until the Peripheral sends nAck and releases Busy. Inline devices may prevent this signal from being asserted and stop the flow of data from the Host to the Peripheral by artificially asserting Busy in any mode.
SPP: nStrobe: Tells the printer that data is available on Data 0-7.
Negotiation phase: HostClk: Tells the printer that data is available on Data 0-7
Nibble: HostClk: Must remain high
Byte: HostClk: Becomes nAck from Host to Peripheral
ECP: HostClk: Tells the printer that data is available on Data 0-7 in forward operation. Becomes nAck from Host to Peripheral in reverse
EPP: nWrite: Set high to allow the Peripherial to drive the data bus and read data, low to assert data and write. Inline devices must respond quickly.
|2||+0.0||Data D0 to D7
(2.6 mA, 24 mA, terminated at Periph by 1k Ohm to +5V)
Periph (in byte, ecp, & epp reverse modes)
|2||6||Data 0 to Data 7:
Carry 8 bits of data in all modes. Must be valid 0.5us before leading edge of nStrobe. Exception: ECP has special RLE compression and multi channel modes that send 7 bits of either repeat count (if bit 7 is 0) or channel address (if bit 7 is 1 and not during Device ID) when HostAck is low on forward data transfers or PeriphAck is low on reverse.
Orginally driven by 74LS374 octal latch, which can source 2.6 mA and sink 24 mA. If peripheral pulls these lines to ground, excessive current may easily be sourced. Protect by inserting resisters inline with the data pins or by using a buffer like FcSemi 54AC245. Exception: Some printer ports allow the driver chip to be tri-stated; PC, Base+2, bit 5 must be set to enable bi-di. Host must direct Peripheral to drive data bus while in:
Byte Reverse mode by setting HostBusy (pin 14, nAutoFeed) low, in
ECP Reverse mode by setting nReverseRequest (pin 16-31, nInit) low , or in
EPP Reverse mode be setting nWrite (pin 1, nStrobe) high.
Negotiation: Carries Extensibility request value from Host
Nibble: Not used
|10||+1.6 as ack||nAck,
|10||3||Inverted (becomes Ack) in Status Input register on PC port. Pulse width
approx 3us. Inline devices must respond quickly. nAck is not
a NAck or Nack. It is a negitave logic Acknowledge rather than a Negitive
SPP: nAck is asserted when Busy goes off or after data is accepted. May also pulse when Peripheral comes on line after power on, reset, or operater selects online mode.
Negotiation: set low with nError, PError and Select high to acknowledge 1284 support after Host sets nSelectIn high and nAutoFeed low. At end of negotiation, set high to indicate that the Xflag(Select) and data available flags may be read.
Nibble: PtrClk is a reverse nStrobe from Peripheral to Host
Byte: PtrClk is a reverse nStrobe from Peripheral to Host
ECP: PeriphClk is a reverse nStrobe from Peripheral to Host
EPP: Intr Interrupts the Host on a positive edge. Inline devices should respond quickly.
|11||+1.7 as Ready||Busy,
|11||1||Inverted (becomes Ready) in Status Input register on PC port.
Indicates that the Peripheral is Busy in SPP, negotiation, Byte and ECP forward modes. Asserted during reading of data, printing, errors, and when offline. Host must not send further data untill Busy is released.
SPP: Busy: Released before, during or after nAck.
Negotiation: not used.
Nibble: PtrBusy carrys bit 3 then bit 7 of the reverse data.
ECP reverse: as PeriphAck, high for data, low for command bytes.
EPP: nWait indicates data available for read by Host in reverse direction and that data has been read & may be released by the Host in forward direction. Inline devices should respond quickly.
|12||5||SPP: Out of Paper or PError:
High when Peripheral has some problem with paper or feed path. nError is
always low when PError is high.
Negotiation: Set high with Select while nError low after Host sets nSelectIn high to indicate 1284 support, then follows nDataAvail(nError).
Nibble: AckDataReq: Carrys bit 2 then bit 6 of the reverse data.
Byte: AckDataReq: Follows nDataAvail(nError).
ECP: nAckReverse acks nReverseRequest allowing Host to again drive data lines. Inline devices must respond quickly.
EPP: User defined 1: Mfgr specific and not defined by 1284.
|13||+1.4 as nSelect||Select,
|13||2||Inverted (becomes OffLine) in Status Input register on PC port.
SPP: Select: High when Peripheral is online.
Negotiation: Set high with PError while nError low after Host sets nSelectIn high to indicate 1284 support, then high if the requested mode is available, or low if not (except for nibble mode which is implicetly accepted by responding to a request for negotiation and by then setting Select low, rather than high) after Host nStrobes the mode request byte to the Peripheral and sets nStrobe and nAutoFeed high.
Nibble: Xflag: Carrys bit 1 then bit 5 of the reverse data.
Byte: Xflag: Not used after negotiation
ECP: Xflag: Not used after negotiation
EPP: User defined 3: Mfgr specific and not defined by 1284.
For inline devices: No need to interrupt on change. If all 1284 modes are supported, can be bypassed.
|14||+2.1 as auto feed||nAutoFeed,
(4.7k Ohm, OC)
|14||17||Driven by 7405 inverting open collector buffers, pulled to +5 volts via
4.7K resistors. Inverted (becomes Auto Feed) in Control output register on
SPP: nAutoFeed or nAutoFd, Mfgr specific. Some printers will add Line Feeds to Carrage Returns when this line is low. Also used as a ninth data, parity, or command/data control bit.
Negotiation: Set low nSelectIn high to request an 1284 mode. Then set high after peripheral sets PtrClk(nAck) low to cause Select to be set to Yes/No.
Nibble: HostBusy set low to indicate Host ready for each reverse nibble, then high to ack receipt.
Byte: HostBusy set low to indicate Host has released the data lines and is ready for each reverse nibble (idle phase if Peripheral has no data to send), then high to ack receipt (or leave idle phase after Peripheral pulses nAck low or exit Byte mode if nSelectIn set low). Inline devices must respond quickly.
ECP: HostAck pulsed low to ack data from Peripheral. Inidicates data or command byte in forward direction.
EPP: nDStrb denotes a data cycle.
|NC||External Oscillator||15||NC||Not used by the PC-Compatible Printer Interface. Not connected to the PC Parallel Interface. (The Centronics Standard Parallel Interface defined this lead as the External Oscillator signal.)|
|NC||NC||Peripheral Logic High,
|18||36||Peripheral Logic High: Set high to indicate (subject to the provisions
of 8.3.5) that all other signals sourced by the peripheral are in a valid
state. Set low to indicate that the peripheral power is off or that
peripheral-driven interface signals are otherwise in an invalid state.
Peripheral manufacturers may, but are not required to, use this signal to provide +5 V of power to an attached device. In any case, the peripheral shall limit the short-circuit current to a maximum of 1.0 A and shall provide circuitry to ensure a valid logic low level (as defined in 8.3.5) on this signal when the peripheral power is off.
|32||4||SPP: nError or nFault, Low when
Peripheral is offline / error / out of paper. Mfgr specific.
Negotiation: Set low with Select and PError high after Host sets nSelectIn high to indicate 1284 support then high if a reverse channel is available, or low if not after Host nStrobes the mode request byte to the Peripheral and sets nStrobe and nAutoFeed high.
Nibble: nDataAvail set low to indicate Peripheral has data ready to send to the host. Then used to send data bit 0 then 4.
Byte: nDataAvail set low to indicate Peripheral has data ready to send to the host.
ECP: nPeriphRequest generates an interrupt to the host in the forward or reverse directions. Permitted, not required.
EPP: User defined 2, Mfgr specific and not defined by 1284.
(4.7k Ohm, OC)
|31||14||Driven by 7405 inverting open collector buffers, pulled to +5 volts via
4.7K resistors. Double inverted from the PC.
SPP: nInitialize or nInit Assert (low) to reset Peripheral. The IBM/EPSON spec added a requirement for more than 50uS duration.
Nibble: nInit: Always high
Byte: nInit: Always high
ECP: nReverseRequest: Set low to allow Peripheral to drive the data lines once the Peripheral has set Peripheral Logic High. Inline devices must respond quickly.
EPP: nInit: Set low to terminate EPP and return to SPP. Obviously must be high at end of negotiation for EPP mode.
IEEE 1284 Active,
(4.7k Ohm, OC)
|36||16||Driven by 7405 inverting open collector buffers, pulled to +5 volts via
SPP: nSelect Input or nSelectIn: Assert to select Peripheral. This line, when low, enables data input into the printer. When supported by the printer, details vary with the implementation. In some cases, this line acts as a simple active low enable line. In others, this signal enables ASCII DC1/DC3 control codes as printer Select/De-select commands to enable or disable data input. Note that printer pin 33 has been redefined as a signal ground return lead for this signal.
Negotiation: IEEE 1284 Active: Set high with nAutoFeed low to begin negotiation phase.
Nibble: IEEE 1284 Active: Set high to indicate that the bus direction is peripheral to host (via status lines). Set low to terminate nibble mode and to set bus direction to host to peripheral.
Byte: IEEE 1284 Active: Set high to indicate that the bus direction may be peripheral to host. Host must direct Peripheral to drive data bus by setting HostBusy low. Set low to terminate byte mode.
ECP: IEEE 1284 Active: Set high to indicate that the bus direction may be peripheral to host. Host must direct Peripheral to drive data bus by setting nReverseRequest low. Set low by the host to terminate ECP Mode and return the link to the Compatibility Mode.
EPP: nAStrb: This signal is used to denote an address cycle. It is active low.
|NC||Host||NC||18||Host Logic High?|
|NC||33||NC||Signal ground connection, added for the return lead of the Select In signal. (The Centronics Standard Parallel Interface defined this lead as the Light Detect signal.)|
|NC||34||NC||Not used by the PC-Compatible Printer Interface. (The Centronics Standard Parallel Interface defined this lead as the Line Count signal.)|
|NC||35||NC||This high going signal provides a positive dc level indication that the printer is connected and powered on. It is a new signal definition; however, it is not connected to the PC Parallel Interface. (The Centronics Standard Parallel Interface defined this lead as the Line Count Return signal.)|
|file: /Techref/io/parallel/signals.htm, 23KB, , updated: 2013/7/22 16:19, local time: 2023/1/27 05:59,
|©2023 These pages are served without commercial sponsorship. (No popup ads, etc...).Bandwidth abuse increases hosting cost forcing sponsorship or shutdown. This server aggressively defends against automated copying for any reason including offline viewing, duplication, etc... Please respect this requirement and DO NOT RIP THIS SITE. Questions?|
<A HREF="http://www.piclist.com/techref/io/parallel/signals.htm"> Parallel Port Signal Detail</A>
|Did you find what you needed?|
PICList 2023 contributors:
o List host: MIT, Site host massmind.org, Top posters @none found
- Page Editors: James Newton, David Cary, and YOU!
* Roman Black of Black Robotics donates from sales of Linistep stepper controller kits.
* Ashley Roll of Digital Nemesis donates from sales of RCL-1 RS232 to TTL converters.
* Monthly Subscribers: Gregg Rew. on-going support is MOST appreciated!
* Contributors: Richard Seriani, Sr.
Welcome to www.piclist.com!