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PIC Microcontroller Programming Article

In Circuit Serial Programming the 17C766

by Dave Roberts [dave.roberts at BTINTERNET.COM]

I found that I could not raise TEST to Vihh ( 13 V ). If I did, it consumed excessive current.

This appeared as a low impedance resistive path to ground from TEST. Devices from different batches exhibited it.

I checked the datasheet, found internal inconsistencies and in the absence of other avenues, doubted the spec.

The answer was that voltage overshoot on the rising edge of TEST killed the chips. My designs use serial programming in the target hardware. Previous designs such as for the 14000 worked fine. This time wiring effects caused the overshoot. Specifically, the rising edge overshot by 3V for about 10 nsec - must use slower circuits in the future !

Also, for reference, the datasheet is in error in the following ways

Programing Datasheet DS30274B dated 1998
Main Device Datasheet DS30289A dated 1998

  1. 1. Figure 4.8 of DS30274B shows that device clock should be on RA0 whereas all other references are to RA1. It should of course be RA1.
  2. 2. Figure 4.8 also states that clock should not be applied until MCLR is at Vihh yet all section 7 figues allow for it to precede Test voltage change. It may precede MCLR.
  3. 3. PS10 is specified as 100 usec in section 7.0 and 100 msec in two places in Figure 4.8 ( also main 17C7XX datasheet DS30289A also says msec not usec in D114 on page 244 ) but 100 usec in figure 3.3 and section 6.0 table ( P9 ). 100usec is of course correct.
  4. 4. Table 5.2 of DS30274B shows in second word bits 0 to 5 as PM2, whereas the mplab inc file for the 17C766 implies just bit 7 ( and checksum calculations also imply just bit 7 in the mask values applied ). I am not sure of the correct answer but believe it is not as per DS30274B.
  5. 5. Note 1 to table in section 6.0 of DS30274B is just plain wrong ( read it through, you'll understand )


file: /Techref/microchip/icsp17c766-dr.htm, 2KB, , updated: 2001/10/18 11:34, local time: 2024/6/17 23:14,

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