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Thread: Help troubleshooting a JFET circuit.
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face BY : James Burkart email (remove spam text)



That was my second guess. Eliminating Rs reverse biases the FET at about
-5V, and Vds is 10V.

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Sincerely,

James Burkart
*Filmmaker & Documentarian*

*Burkart Studios*
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On Mon, Sep 11, 2017 at 9:26 AM, George Smith <spamemcq-jrcr.....spamEraseMEdea.spamcon.org>
wrote:

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