piclist 2017\09\11\154403a >
Thread: Help troubleshooting a JFET circuit.
www.piclist.com/techref/index.htm?key=help+troubleshooting
face picon face BY : Sean Breheny email (remove spam text)



Dwane - no, for an n jfet the gate would only be forward biased if it were
higher than the source in voltage (gate more positive than source). Jfets
are always depletion mode devices so they are on with no gate bias and turn
off when reverse bias is applied to the gate-channel junction


On Sep 11, 2017 3:10 PM, "Dwayne Reid" <@spam@dwaynerspamplanet.eon.net> wrote:

Hi there, Sean.

You are forgetting about current that flows through the gate resistor
to Ground.  This is a J-FET, so the gate diode junction is forward
biased if Rs is open.

Another possibility that Rs is very high value.  I haven't bothered
to work out the math for the possible high value.

dwayne


At 11:58 AM 9/11/2017, Sean Breheny wrote:
{Quote hidden}

Rd
> > >was my first thought, but that also results in Vds being 12.6V. What
am I
> > >missing? Can anyone get me on the right track? I have shorted and
opened
{Quote hidden}

--
Dwayne Reid   <KILLspamdwayner@spam@spamspamBeGoneplanet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
780-489-3199 voice   780-487-6397 fax   888-489-3199 Toll Free
http://www.trinity-electronics.com
Custom Electronics Design and Manufacturing

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