piclist 2003\02\18\200608a >
Thread: Pin won't turn off properly
face picon face BY : James Newton, webhost email (remove spam text)

source= http://www.piclist.com/postbot.asp?id=piclist\2003\01\30\155449a

Jinx, I'm sorry I didn't answer you sooner, I've just seen this thread... I
think you understand all the issues correctly, but I'll bet that you (as I)
are not seeing the EXTENT of the issues.

With speed comes friction. An SX at 50MIPS is a little bundle of
read-modify-write problems just itching to happen. Anything that runs at 50
or 75 MIPS is going to do this sort of strange things when you use bit
operations directly on a port.

The data sheet says:
3.1.1  Read-Modify-Write Considerations
Caution must be exercised when performing two succes-
sive read-modify-write instructions (SETB or CLRB oper-
ations) on I/O port pin.
Also note that reading an I/O port is actually reading the
pins, not the output data latches. That is, if the pin output
driver is enabled and driven high while the pin is held low
externally, the port pin will read low.

Which really understates the issues in my opinion.

Take a look at those signals with a good scope rather than that logic
analyzer and watch all the nice ones and zeros devolve into a mess of
ringing, standing waves, etc... I couldn't believe it when I finally saw the
signals in my first prototype on a really good scope (100MHz if I remember
correctly and even that is not really sufficient for 50Mhz signals)

I have personally seen an SX work just like a TDR; allowing us to see the
difference between a PCB with a broken trace (still conductive, but
apparently hairline cracked) and one that was not just from the standing
wave returning from the crack at just the point when the SX needed to
transition the pin. we got 11111000000011111 on the good board and
11111000000010111 on the bad one. Looking at the trace on a (really, really
good) scope, you could see the negative spike killing the pin drive at a
consistent period from the first 1 to 0 transition. We could modify the
length of the low state of the pulse and see the 0 still appear at a fixed
time. e.g. 11111000001110111 or 11111000111110111

If you happen to "read-modify-write" one pin at the exact time that your
other output pin gets hit with some crap, it will retain the crap and loose
its previous setting.

In short: clrb and setb are not for ports. Exception: With a low value
resistor in series and a tiny cap on the other side of the resistor to
ground, you can often get away with it.

When you need REALLY fast updates (like pulses) out a port, just setup the
chip so that W appears as register 1 (you can do that on an SX) then read
the shadow into W. setb 1.x; mov RA, W; clrb 1.x; move RA, W. that will get
you 25Mhz pulses from the 50Mhz SX without concern for RMW problems.

One other gottcha: When you do use shadow registers, look out for interrupt
routines that try to update the shadow while you are working on it.

James Newton: PICList.com webmaster, former Admin #3
jamesnewtonspampiclist.com  1-619-652-0593 phone
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See also: www.piclist.com/techref/ubicom/devices.htm?key=sx
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