Matched Inverter and Buffer
Peter L. Peres email (remove spam text)
On Sat, 24 Aug 2002, Donovan Parks wrote:
>Does one typically just use an RC circuit to implement an "adjustable
Yes, or a ready made delay line. These were common in DRAM days (discrete
dram, not simms). It's a 16 pin dil package with a delay inside, tapped
every 20nsec or so. You pick the output you need.
The TAxxxx driver may make your day because all other solutions (involving
gates) have different Tp for inverting and noninverting gates. So you'll
need a delay as above.
You really have to set a goal and try to reach it. How 'exactly' must the
edges match ?
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