piclist 2002\05\27\074408a >
Thread: Divide by 3 - yet another cheapo design challenge
face BY : Russell McMahon email (remove spam text)

> > I have been asked to divide a digital signal by 3.

> > Anyone want to implement a more elegant asymmetric divide by 3 on an
> > asymmetric 3 to 70 Hz input signal at a lower all up cost than a CD4040,
2 x
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I thought about using a 4017.
Unlike the 4040 it doesn't have a Schmitt input on the clock so is more
prone to erroneous clocking in real world situations.
The 4017 clock rise & fall time are specd at 20 uS max which is far better
than the 500 Ns odd specs for JK flip flops - may work OK in many real world
apps and very likely in mine. The 4040 spec for rise and fall time is "no
limit" due to the Schmitt trigger input.

The 4017 reset method (which I have used before today) is also "naughty" in
the same manner as my 4040 method - but it does work and it saves two diodes
and a resistor.

Note that, if you use the 3rd output as your divide output you are liable to
be disappointed. The pulse here, as with the 4040, lasts only until the IC
resets and is usually VERY short and will typically not rise to anywhere
near full supply (not on my 100 MHz scope anyway :-) ) . Using either of the
other 2 outputs produces a 1/3 duty cycle output.

       Russell McMahon

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See also: www.piclist.com/techref/method/math.htm?key=divide
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