piclist 2001\07\09\112746a >
Thread: 12CE5xx & FL51XINC.ASM & Internal EEPROM
face BY : Garber, Mike email (remove spam text)

What I mean is this:  Within FL51XINC.ASM are lines such as -

       movlw   (0x01 << SDA)   ; make SDA an input
       tris    I2C_PORT
       movlw   0x00            ; make sure both are outputs
       tris    I2C_PORT

(this is really indended to configure 2 bits of the single GP I/O port
but if I wanted some other bits to be inputs, this code snippit would
change them to outputs, right?  Also, I see in section 4.4 of the 12C5XX
data sheet that setting a TRIS bit to '0' would disable the wake-up on
change, and weak pullup function for the corresponding pin).

So, wouldnt the "correct" way be to assign a shadow register -
       ... (other data registers)

{along with some bit definitions -
       GP0     EQU     0       ;I wanna use this as an input
       GP1     EQU     1       ;I wanna use this as an input
       GP2     EQU     2       ;I wanna use this as an output
       SDA     EQU     3       ;Bi directional

and in my main code -
       movlw   (0x01 << GP0) | (0x01 << GP1)           ; GP0 & GP1 an input
       movwf   TRIS_SHADOW
       tris    I2C_PORT

and when I want to make SDA and input -
       movf    TRIS_SHADOW, w
       iorlw   (0x01 << SDA)   ;generate OR mask
       movwf   TRIS_SHADOW
       tris    I2C_PORT

and when I want to make SDA and output -
       movf    TRIS_SHADOW, w
       andlw   ~(0x01 << SDA)  ;generate AND mask
       movwf   TRIS_SHADOW
       tris    I2C_PORT

Or is this really overkill?

Mike Garber

> {Original Message removed}

See also: www.piclist.com/techref/microchip/memory.htm?key=eeprom
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Subject (change) 12CE5xx & FL51XINC.ASM & Internal EEPROM

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