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Thread: rmw problem with a/d port?
www.piclist.com/techref/microchip/ios.htm?key=a%2Fd
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face BY : Mike Mansheim email (remove spam text)



I think I've just run into a rwm effect, but not because I'm changing
port directions.
F876 portA configured as follows (set once, doesn't change):
RA0, RA3:       analog in
RA1, RA2, RA5:  out
RA4:            digital in
ADCON1:  RA0,1,3 as analog in, RA2,5 as digital i/o.
Whenever RA2 or RA5 are changed, RA1 goes low unexpectedly.
According to the data sheet:
"When reading the port register, any pin configured as an analog input
channel will read as cleared (a low level)."
I assumed this referred to the ADCON1 setup AND the tris direction, i.e
it was analog IF it was an input, so I figured I was ok using RA1 as an
output.  RA1 was an analog in, but was last minute changed to an output.
There are only certain allowable combinations of analog & digital pins,
so I can't just independently declare RA1 as digital i/o.
Obviously RA1 is behaving as though it is getting read as a low
as part of changing one of the other bits in the port (classic rmw).
My questions are:
- have I diagnosed the problem correctly?
- I can fix this by simply refreshing RA1 to it's correct state after
 any operation on the rest of the port.  Is this ok, or is there some
 bigger problem with using an analog input pin as a digital output?

Thanks for any help.

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