Mike Mansheim email (remove spam text)
Using an F876 with a 10M clock, I'm looking to create a precise 1ms
interrupt using timer 1. I found a thread in the archives that
covered this, and am using Bob Ammerman's suggestion for my first
try (I'll play with the ccp module later). It's working, but it
did raise a couple of questions.
The technique is to add a constant to the timer value in the
- Bob say's to add 65536 - 2500 + fudge, where fudge accounts for the
instructions while the timer is turned off. Since those instructions
are doing a 16 bit add, there is a btfsc statement. Wouldn't this
introduce the possibility of 1 cycle of jitter, depending on whether
or not the branch was taken?
- I have nearly the same code as Bob's example, so there are 6
instructions between turning the timer off and back on (including the
aforementioned btfsc). I assumed that the fudge would be 6, maybe 7
to account for the instruction to start the timer back up. When
I check it on a scope, I need a fudge of 10 or 11, depending on the
clock (one running hairs below 10M, the other hairs above). Any idea
why this would be?
I found another entry (by Bob again), where he talks about completely
eliminating jitter by looking at the lsb of TMR2. Why does this indicate
whether or not a 2 cycle instruction is in progress? Is it the same for
the other timers?
(this was an article of some sort, not part of a thread, as near as I
could tell, so I couldn't pursue it any further in the archive)
Thanks for any help.
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