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Thread: 2-Compliment Addition/Subtraction. Questions
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face BY : James Lee Williams email (remove spam text)



Hello,

I finally dug out my digital systems book from way back in colledge, to
find out more about how two's compliment addition is used in the PIC
micro controller.  Now I have a few questions requarding how they are
contiguous for 16/24/ and 32 bit addition.

If the magitude of the addition is only 7 bits and the sign is the eight
bit, then how can the registers add a full 256 value on the lower byte
with no reguards to it's sign.  For instance, I the number 200 decimal
was added to 100 decimal.  The 2's complement of each of these would be:

200 = 0xC8 B'11001000'
-----------------------------------
2'CO = B'00110111'
                       +1
-----------------------------------
          B'0111000'  (2's Compliment for.)  Sign bit is 0 meaning
positive number

100= 0x64 B'01100100'
-----------------------------------
2'sCo = B'10011011'
                +1
-----------------------------------
       B'10011100' (2'S Compliment) Sign bit is now 1 meaning negative,
this can't be?

Now we add the two as:
 B'0111000'
+B'10011100'
------------------------------------
11010100        Then we compliment then again.
0010100 Carry bit is set.  Sign bit is zero.
But none of these are correct result value.

So my next question is:  Is the 7th Bit include in the 2's compliment
and addition?  Or is it just the first 7bits 0-6?
Next, is the carry by set because of bit position 6 addition or the
signed bit?

It has been many years since I have working with this kind of thing, so
please bare with me.  I must have a full understanding of what is
happening in order for me to program my Bresenham routine correctly.  I
have always programmed in C/C++ so this has not been an issue before.

Regards,

James

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