David VanHorn email (remove spam text)
>What about fat Vcc, thin ground?
>The efect is the same and sometimes the total impedance of power structure
Depends on where, but I don't like thin ground anywhere.
In my article, I describe my general approach to bypassing.
I want everything tied together with low impedance ground.
I want the bypass cap to return to the chip's GND pin as short as possible,
so I place the bypass at GND.
I use a fat track from VCC to bypass, to minimize impedance.
I use a thin track from the bypass to system VCC, maximizing impedance.
Finally, I flood GND, with some use of "no flood" zones or shoving traces
around, to keep sections isolated.
Ex: in an SMPS section, I would return all gnd pins to the gnd pin of an
SMPS chip, then a fat track from there to the system. Then in flooding, I
would make sure that only the fat track route actually gets out of that
section, but within the section, everything's flooded. There are
exceptions even so, but the main idea is to follow the current, and make
sure it gets back to where it came from.
Dave's Engineering Page: http://www.dvanhorn.org
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