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Thread: : i2c Master Timing Problems
face picon face BY : Olin Lathrop email (remove spam text)

> Well, I examined things more closely and noticed that the
> slave wasn't generating the ACK because its BF bit (SSPSTAT<0>)
> comes up set upon getting my address write interrupt.

As it should, because the address byte is now in SSPBUF.

> I
> clear that during initialization, and reset it when I read
> from the buffer, but by then it's too late, right?

No, as long as you don't get a second byte from the master before you read
SSPBUF.  One problem with Microchip's MSSP is that there is no flow control
when a master is writing to a slave.  The slave can do clock stretch when
being read from, but has no way of slowing things down when being written
to.  I often use a third line for this when I want bi-directional flow
controlled IIC.

What is the bit rate of your IIC bus and what is the instruction rate of
your slave?  If you know the master will never send a message longer than
some pre-determined length, then you could have your interrupt routine grab
the bytes as they come in and stuff them into a buffer for later processing
or for processing by the foreground loop.

If you are running your slave at 20MHz and the IIC at 400KHz (I consider
this the maximum useable IIC rate, due to the various problems), then you
get 112 instructions per IIC byte transferred.  That is more than enough to
take the interrupt, read SSPBUF and stuff it into a buffer.  It may not be
enough if you have other interrupts that can cause a large latency or are
trying to actually handle each byte before the next one comes in.

> How do
> I get the slave to generate the ACK?

It will by itself if everything is going right.  Again, keep in mind the
MSSP bug where the master may see NACK instead of ACK.

Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, KILLspamolinTakeThisOuTspamspamembedinc.com, http://www.embedinc.com

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