verifying from vddmin to vddmax & bootloading
On Wed, 31 Jan 2001 10:12:09 +0000, you wrote:
>the recent thread on 16f877 programming inspired a little musing:
>'decent' programming hardware apparently verifies a part over a range of Vdd values to ensure the
>bits have been set correctly.
I believe this is only the case for OTP parts
>it would seem that using a bootloader with a flash part the bits are only be verified at the current
>(1) a bootloaded part may be less reliable than a 'hardware programmed' part.
>(2) there's no need to do the whole vdd range thing with flash - it's a technique that's only
>meaningful for eprom type memory cells.
This would be a reasonable assumption. The flash write self-timing
will probably ensure sufficient overprogramming to cover all voltage
>(3) there's some cunning circuitry inside the flash parts that does actually ram the voltage supply
>down (and up ?) to the extents of legal vdd during the verify.
Nope - this would cost money to add (die area)
>any of you have anything _other_ than anecdotal evidence to support any of these possible
>conclusions, or indeed some other conclusion i have missed ?
When programmed via bootloader, it's likely that this will be at the
normal application Vdd. A 'socket' programmer doesn't know what
voltage the chip will run at, and it's therefore more important to
verify the whole range.
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In reply to: <802569E5.00384569.00@buffer1.HQ.quantel>
See also: www.piclist.com/techref/power/decouple.htm?key=vdd
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