Decoupling App Note
Russell McMahon email (remove spam text)
>At 02:24 PM 1/5/01 -0700, Kenneth Godee wrote:
>>I read an application note about a month ago that was quite
>>good on Microchips web site concerning decoupling capacitors.
>>Now I'm trying to find it again. Their search engine is the pits!
>>Does anyone have or recall the number to this app note?
>Don't worry, be happy.
>Put the cap at the ground pin. Run VCC from the chip to the cap on a wide
>track, and from the cap to the system VCC on a narrow track.
>Return your xtal caps to the chip's ground pin, by an isolated track.
>The cap size is relative to the frequency, but you need to know where you
>have the problem, before you know what size cap. Generally, 0.1 has least
>impedance at 3 MHz, 0.01 at 30, and 0.001 at 300. Other values are in
>between as you would expect. This holds true on most common caps, SMD and
>thruhole. (I was surprised too)
Others please critique these comments as required and add other useful
All the above, plus -
Scatter caps of size as specced above around board - one per IC plus perhaps
a few others at meetings of the power supply.
Tantalum cap of around 10 uF per board helps but these are EXCELLENT fuses
which fail short circuit if you power supply has spikes above their rated
voltage so only use where you are SURE their rated voltage will NEVER be
If in doubt use SOLID aluminum in the same role.
If you are laying out a 2 layer PCB and are keen, run ground and earth
tracks parallel on opposite sides of the board.
Never have more than one path to the system ground point from any earth
point (ie no closed loops in the earth network). Same for Vcc but perhaps
TRY to run earth network as a "tree" with the trunk base at the system earth
point and large branches feeding small branches feeding smaller etc.
Keep analog and digital grounds separate - ground run from each should start
at system ground point and proceed out to point of use with no commonality
BUT be aware that where an IC has mixed analog and digital inputs which are
related in some manner (eg micro + A2D or comparator or reference or some
combination) the ground circuit voltage drop may affect the device operation
and it MAY be better to common the digital and analog grounds for the chip
nearby. Each circuit with compromise ICs needs to be designed to optimise
the compromise aspect which is most important to you.
For super critical IC's consider using several caps of differing sizes in
Keep cap leads as short as possible to minimise lead inductance.
Exception - leads can be cut to length required to generate a specific
series resonant frequency if main frequency of interest is known BUT this is
a rather expert and/or desperate approach.
Read regulator spec sheet carefully. Input and output capacitor requirements
can vary quite markedly and may affect stability (regulator can oscillate at
several MHz while providing apparently clean power! Some regulators set
specs on both maximum AND minimum equivalent series resistance (ESR). Too
"good" and ESR can cause problems.
Electrolytic Cap lifetimes halve for every 10 degrees C increase in
operating temperature - beware positioning near eg hot power resistors. Ecap
lifetimes drop even more drastically when stored hot with DC power removed
Ecaps die quicker when run markedly BELOW their rated voltage.
Tantalum capacitors are great fun - they can be persuaded to smell really
terrible, smoke, shriek, flame and explode (sometimes all of these one after
the other) when exposed to reverse polarity or voltage spikes over their
rated voltage. They usually fail short circuit protecting other components
but making trouble shooting "interesting". Use them in these circumstances
to amuse your customers.
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