Robotics with PIC16F877 anyone??
Dan Michaels email (remove spam text)
Tom Handley wrote:
>>> I'm using multiprocessing with a 16F876 for testing, 12C508 for the IR
>>>detector, 12C671 as a dual RC servo controller (I needed the TMR0
>>>interrupt), and a 16F84 as a dual H-Bridge controller. I plan on another
>>>12C508 for the Ultrasonic detector. They all talk over a serial interface.
Do you have specs or good xmtr ckts for any ultrasonic transducers?
I got some from Jameco, but specs are minimal.
> I could use polling but I wanted to know immediately if there was a
>bumper switch hit. I had intended on 4 switches. The 74x30 was a simple hack
>to expand the RB0/INT capability. I want an event-driven system so the
>processor (16F877) can spend it's time on the AI responding to sensory
>inputs as needed. I'm also adding external SRAM.
Did you think about using the RB4-7 interrupt on change for the
bumpers? I am wavering between 4 bumper switches to RB4-7 IRQ or
feeding same to 4-way R-ladder for sampling by 1 A/D channel. It
would be polled, but I think my bot will have minimal real-time
tasks due to using the L293 chips plus hw PWM for motor control,
and not driving servos/steppers in real-time. OTOH, I did plan to
have servo capability available, so ????????? [lotsa possibles]
My plan is to do the multi-level hierarchy mentioned a few
weeks ago. The lowest board will have a PIC40 doing all the stuff
I mentioned 2 days ago, and I'll stack above it one of my SBC40-SRM
boards [with 32KB SRAM + PIC40] for higher level stuff. Lower bd
will probably do ok with 4 Mhz xtal, higher will go 20 Mhz.
Maybe add a gameboy camera and scenix board eventually [ha].
The lower board will have some basic algorithms built-in, like
move around, don't get trapped in a corner, and find your way
around any object you encounter. Basically brainless tasks. Bump,
back up, and go the other direction. Also, find you way back home
for feeding - ie, acquire light blinking at XX hz. So using the
lower board only, the bot will be able to survive and stay fed.
The upper board will eventually have algorithms for more sophisticated
stuff. Area map building [in SRAM], remembering [SRAM memory backup
in serial EEPROM - probably have to stop the bot every minute or
so to update], sensor integration, behavior strategies, etc. The
multilevel scheme is the way living organisms work of course.
I have a couple of CPLD
>designs that provide a 19-Bit address bus and 3-4 external chip selects. One
>version is for a parallel bus (Port D, CS, RD, WD) and the other uses an
>SPI-style interface. We talked about this a few months ago.
Yes, no doubt much more powerful than my SBC40-SRM PIC+SRAM pcb, but
then I built it so I guess I am obligated to use it :).
>In anycase, nothing is cast in stone yet...
Story of my very life -[luckily].
- Dan Michaels
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