David VanHorn email (remove spam text)
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>Can you describe what you see very often that's wrong?
Bypasses should be located at the chip's ground pin.
Power should be routed to the cap, and then to the chip from the cap.
Anything else compromises the bypass.
Sockets with caps in them are marginally better than nothing at all (see
above), but it's even worse, because you've provided a path past the cap on
the ground side as well.
It's hard to show this without pictures, but a cap with tracks or leads out
to power and ground tracks, especially thick ones, is much less than
optimum. You really want the current to be forced to walk across that cap.
Ideally, three-leaded caps (from murata or panasonic) with the center lead
as ground, and the other two treated as "in" and "out".
In many systems, you'll see a pair of tracks between rows of chips, with
caps across the tracks, and one track supplying VCC to row 2 while the
other supplies gnd to row 1.
While this system looks nice at first glance, it really is very noisy.
(look at where the current flows when a given chip needs a pulse of current)
The common practice of putting a 0.1uF on everything is probably better
than not bypassing anything, but it's far from ideal. The size of bypass
caps is related to what frequencies you want them to be low impedance for.
You need to tailor the bypassing for each "consumer".
Adding large value tantalums without a specific need is mostly a waste of
Using fat power tracks can be bad. Narrow tracks are higher impedance to
high frequencies, but are the same DC resistance (close anyway). I use a
wide track from the chip to it's bypass cap(s) and a narrow track from
there back to system power. This is because in the high frequency domain, I
want the current to come from the bypass cap, not from the system buss.
The ground return is just as important as the power. You need to make sure
that the chip not only has a low Z ground, that ground needs to get
directly back to where VCC came from. If for example, you have a chip
bypassed perfectly, but it has a long path to get back to the sourcing cap
at the regulator, you will have a noisy system. The noise current will
flow around the system, and find it's way back to the reg cap eventually.
If you have a system that is noisy, and it gets worse with cables plugged
in, or with long leads attached to "ground" pads, this is usually why. If
you have a chip driven by fast signals from another chip, then there needs
to be a low Z ground between them as well. It becomes clear when you think
of cmos inputs as capacitors (which they are) driven by switches on the
other end of the line. That charging current coming out of the destination
chip's ground has got to return to the source chip somehow! Wouldn't you
rather pick the path?
Microprocessor crystal caps should be connected by an isolated track to the
uP's ground pin. Not to anywhere else. The current in that oscillator can
make a nice transmitter, especially if it's coupled into a nice low
impedance ground track an inch or so away. I've seen systems fail part 15
for that alone, when the ground track happened to be a resonant length on
some harmonic of the xtal.
I may have missed a couple, but that's a pretty good "rouge's gallery" of
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In reply to: <009701bfcfdc$d31c1150$8fe20418@cx975884a>
See also: www.piclist.com/techref/logic/dsps.htm?key=filter
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