RAS/CAS on DRAM?
Peter L. Peres email (remove spam text)
On Wed, 11 Nov 1998, John Payson wrote:
> If more I/O is needed that what would remain after the DRAM
> was interfaced, then use of extra hardware or a PLD to aid in
> the DRAM interfacing might be warranted. As for pricing, my
> impression of the PLD/FPGA situation is that going much beyond
> a 22V10 requires expensive development tools. Is this no longer
The latest info is that most development tools have trial/demo versions
that will let you use a small subset of the parts from that manufacturer
for a limited amount of time at least. Registration is also not in the
'killing' class anymore, $500 will get you going pretty far. Entry level
packages are from $0 to $199 or so.
The most popular makes use a downloader cable that is simpler than the
simplest DIY PIC programmer.
I believe that there will be A LOT more FPGA use in amateur and startup
circles in the following year. This is not going to affect PICs imho
(PICs are very lean + mean for their price).
I have said before that I did an IDE disk interface with a PIC16C64 and I
believe that a SIMM can be driven in the same way. The only point is, that
most beginners jump into a design head on without computing anything. A
serial RAM or two and a small PIC may end up being cheaper than doing it
all from scratch with a SIMM and will beat the SIMM at power requirements,
data retention and more.
In reply to: <01BE0DA2.90344400@JOHN_WKST1>
See also: www.piclist.com/techref/mems.htm?key=dram
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