RAS/CAS on DRAM?
Peter L. Peres email (remove spam text)
On Tue, 10 Nov 1998, William Chops Westfield wrote:
Ok, so you want to spend money for a PIC16C64 or higher for the IO pin
count, and for a DRAM to tie most of the pins up (unless you can multiplex
the pins, but even then it is expensive). Ok.
The 16C64JW was more expensive than a Lattice 1016 or 2032 FPGA the last
time I checked, and the FPGA puts its IO pins to much better use than a
PIC, for the same money and clock speed.
I did not say that it cannot be done with a micro, I said a FPGA is
better in this case.
And yes, it can be done with a PIC, for example the much quoted 16C64.
In reply to: <CMM.email@example.com>
See also: www.piclist.com/techref/mems.htm?key=dram
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