piclist 1998\11\11\161955a >
Thread: RAS/CAS on DRAM?
www.piclist.com/techref/mems.htm?key=dram
picon face BY : Peter L. Peres email (remove spam text)



On Tue, 10 Nov 1998, William Chops Westfield wrote:

{Quote hidden}

Ok, so you want to spend money for a PIC16C64 or higher for the IO pin
count, and for a DRAM to tie most of the pins up (unless you can multiplex
the pins, but even then it is expensive). Ok.

The 16C64JW was more expensive than a Lattice 1016 or 2032 FPGA the last
time I checked, and the FPGA puts its IO pins to much better use than a
PIC, for the same money and clock speed.

I did not say that it cannot be done with a micro, I said a FPGA is
better in this case.

And yes, it can be done with a PIC, for example the much quoted 16C64.

Peter

<Pine.LNX.3.95.981111171921.469A-100000@plp4.plp.home.org>

In reply to: <CMM.0.90.4.910720641.billw@flipper.cisco.com>
See also: www.piclist.com/techref/mems.htm?key=dram
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