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Thread: External A/D jitter
www.piclist.com/techref/io/atod.htm?key=a%2Fd
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face BY : Matt Bonner email (remove spam text)



Dave Johnson wrote:

> I'm considering putting a sample and hold or something similar
> between the "thing" and the converter, does that sound like a good idea?

Sample and holds require careful design and component selection.  Better
to use an ADC with an internal S&H (unless it's too late in the design
cycle).

> >What conversion method does the ADS7822P use?  How many stable bit are
> >you getting?
> It's a classic successive approximation converter.

Ahh...Successive approximation.  Definitely pay attention to what Chris
Eddy said. SAR ADCs are very suceptible to noise - that's why you don't
see many with over 12bits resolution.  I've tried a few high-res SAR
ADCs and they didn't work too well.  We use sigma-delta ADCs with an
adjustable notch filter.

> Right now I'm
> only getting something like 7 stable bits, the lower 4 or so are jumping

Even with careful layout, don't be disappointed if you can't get it past
10 stable bits.  ADC manufacturers seem to play games with specs - real
world circuits can't match up to the test circuits they use in the
labs.  I was really happy to come across a 24bit ADC that spec'd
*effective* resolution from 10bits to 24bits depending upon circuit
configuration (filtering, gain, etc).  My final design matched the
published specs - I calculated that I would get 18 bits with my
configuration and that's what I got.

> all over, but as I said my initial, un-thinking circuit layout is really
> bad, so I'll work on that...

Good place to start.

> BTW, is it OK to hit the PICList with these sorts of more general
> electronics questions?

Definitely (just check out the archives and you'll see a lot of general
questions).  If you get *too* far off topic, embed [OT] somewhere in the
subject line.

--Matt

<36139F73.B04BC101@sunada.com> 7bit

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