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Thread: Working on a VHDL PIC Core..
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face BY : Joel Carvajal email (remove spam text)



On Mon, 27 Nov 1995, Brian Read wrote:

> If you want this "emulator" to interact with the rest of the circuitry and
> the world like a real PIC then you better have it do reads and writes on
> the same phases of the clock as the real thing. Otherwise you are asking
> for trouble. Timing differences between your "emulator" and a real PIC
> can and will jump right up and bite you.

That's right!  It is very important for emulators to have timing
specifications the same as the real thing.  Otherwise, you don't really
emulate.  I'm in the 32-bit CPU emulator business.

But the different clock phases in focus here are internal to the PIC.
This was in reply (or rather an affirming remark?) to Thomas Coonan.  The
question is raised with regards to the design of the PIC.

In larger (32-bit, 64-bit), such different clock phases may be required
because of several instruction pipeline stages.  In the PIC, there are
only 2 instruction pipeline.

What happens during the different clock phases--that's the question.

Thanks for clearing it out.
<9511280543.AA16376@MIT.EDU>

In reply to: <m0tKU9P-0004I7C@polgas>
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