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PICList Thread
'simm memory chips'
1997\05\16@113005 by Joel.Simpson

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part 0 94 bytes
Thanks,
Joel R. Simpson
LAN Admin.
King County, WLRD
Phone (206)296-8375  Page(206)994-4343


1997\05\16@115534 by Antti Lukats

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At 08:12 AM 16/5/97 -0700, you wrote:
>I'm looking for information on interfacing pic's to 1meg simm memory
>modules.  Are there any information resources available on the net?

on the net you can find:

a) Simm module pin names - dont know the url :(
b) digisccope project at http://www.parallaxinc.com

where 16C55 is used with dynamic RAM chip.
that code could give some ideas of how to interface to dRAM's
in general

antti

-- Silicon Studio Ltd.
-- http://www.sistudio.com

1997\05\21@055918 by Scott Stephens

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For SIMM memory chip data sheets, checkout Mosel Vitelic's  V53C104 DRAM.
Checkout Fast page mode, it may help with speed.

Also, when I searched the Web, I found a little DRAM to Z-80 tutorial you
may find interesting too. Don't have the address, but it came from (search
the web for) Tim Olmstead.


'simm memory chips'
1997\06\10@192501 by Josef Hanzal
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I have just succesfully interfaced PIC16C74A to a 256K SIMM module (30 pin).
I remember there was a call for info on this topic some month or two ago and
not much response. Whoever posted the request, does your interest still last ?

1997\06\10@211112 by David Gould

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>
> I have just succesfully interfaced PIC16C74A to a 256K SIMM module (30 pin).
> I remember there was a call for info on this topic some month or two ago and
> not much response. Whoever posted the request, does your interest still last ?

I am the person who asked about serial rams. I suspect you have something
different, but since I did not find any serial rams, I am looking to build
one. So, please post how you did this. Thanks!

-dg

David Gould           spam_OUTdgTakeThisOuTspamillustra.com            510.869.6383 or 510.305.9468
Informix Software (formerly Illustra)  1111 Broadway #2000  Oakland, CA 94607
- I realize now that irony has no place in business communications.

1997\06\11@143158 by Josef Hanzal

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Hi everybody,

I must say I did not expect that number of responses on such a strange
topic. I will post the routines with some comments in a day or two.

Josef Hanzal

1997\06\12@001824 by Richard Adamec

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On Tue, 10 Jun 1997, Josef Hanzal wrote:

> I have just succesfully interfaced PIC16C74A to a 256K SIMM module (30 pin).
> I remember there was a call for info on this topic some month or two ago and
> not much response. Whoever posted the request, does your interest still last ?
>

I didn't post the original request but would be interested in what you
found out and any tips as I was looking at doing the same soon.

1997\06\12@020705 by Eric Martens

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----------
| From: Josef Hanzal <.....euroclassKILLspamspam@spam@PHA.PVTNET.CZ>
| To: PICLISTspamKILLspamMITVMA.MIT.EDU
| Subject: Re: simm memory chips
| Date: woensdag 11 juni 1997 20:35
|
| Hi everybody,
|
| I must say I did not expect that number of responses on such a strange
| topic. I will post the routines with some comments in a day or two.
|
| Josef Hanzal

I would like to have a copy too.


Greetings Eric Martens

| | | | | | | | | | | | | | |
+-----------------------------+
|                             |
|     Eric Martens            |
|   EMAR ELectronics        +-+
|   .....emarKILLspamspam.....knoware.nl         |
| Fax: +31-(0)492-522418    +-+
| Maxer: +31-(0)660137959     |
|                             |
+-----------------------------+
| | | | | | | | | | | | | | |

1997\06\12@121121 by Josef Hanzal

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When I promissed to post the routines, I did not realize, they are quite
long. So if anybody would like to see them, mail me private request, I will
send you all the code and comments. I do not have a www page yet to post it
there.

Regards,

Josef

1997\06\12@122852 by Jeff Huettner

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Josef Hanzal writes:
> When I promissed to post the routines, I did not realize, they are quite
> long. So if anybody would like to see them, mail me private request, I will
> send you all the code and comments. I do not have a www page yet to post it
> there.
>
> Regards,
>
> Josef
>


Josef - I'm interested in this.  Thanks!

OoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoOoO
    Jeff Huettner    (972) 519-4077         Any opinions expressed here
    EraseMEjhuettnespam_OUTspamTakeThisOuTspd.dsccc.com   (work)           are not necessarily mine
    jeffspamspam_OUTconnect.net         (home)               or anyone elses!

1997\06\12@192255 by Douglas J.A.R.Sasse

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>When I promissed to post the routines, I did not realize, they are quite
>long. So if anybody would like to see them, mail me private request, I will
>send you all the code and comments. I do not have a www page yet to post it
>there.
>
>Regards,
>
>Josef
>
>Please place me on your E-mail list.

@spam@douglasKILLspamspamic.mankato.mn.us
or
http://ic.mankato.mn.us/~douglas  <--LINK to Ben Wirz Electronics (U.S.
source of SIMMSTICK(tm) PIC 16C84)
Http://ic.mankato.mn.us/~douglas <-- LINK to Ben Wirz Electronics
-->Simmstick(tm) Info.
KILLspamdouglasKILLspamspamic.mankato.mn.us
RemoveMEdouglasTakeThisOuTspamnexus.mnic.net

Snail-Mail:

Douglas J.A.R.Sasse
P.O.Box 1064
Mankato, Minnesota 56002-1064
U.S.A.

Douglas Sasse <aka- Jeffery Allen Rand>
56002-1064
U.S.A.

1997\06\12@215058 by Andres Djordjalian

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> When I promissed to post the routines, I did not realize, they are quite
> long. So if anybody would like to see them, mail me private request, I will
> send you all the code and comments. I do not have a www page yet to post it
> there.
>
> Regards,
>
> Josef
>

Hello Josef. I'd like to see your routines, please send me a copy. Thanks
in advance.

Andres Djordjalian
spamBeGoneadjordjspamBeGonespamaleph.fi.uba.ar

1997\06\12@222531 by Andrew Russell Morris

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At 10:44 PM 6/12/97 +0000, you wrote:
>> When I promissed to post the routines, I did not realize, they are quite
>> long. So if anybody would like to see them, mail me private request, I will
>> send you all the code and comments. I do not have a www page yet to post it
>> there.
>>
>> Regards,
>>
>> Josef
>>
>
>Hello Josef. I'd like to see your routines, please send me a copy. Thanks
>in advance.
>
>Andres Djordjalian
>TakeThisOuTadjordjEraseMEspamspam_OUTaleph.fi.uba.ar
>

I realize I'm supposed to answer Josef directly, but I lost my copy of his
message that has his email address.

Joseph; please send me a copy of your code and comments. Thanks a lot.

1997\06\12@235417 by Dvorak Viktor

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Josef Hanzal wrote:
>
> When I promissed to post the routines, I did not realize, they are quite
> long. So if anybody would like to see them, mail me private request, I will
> send you all the code and comments. I do not have a www page yet to post it
> there.
>
> Regards,
>
> Josef

Pekne prosim o zaslani vzse citovaneho. Dekuji predem.

                                               Viktor Dvorak
                                               Praha

1997\06\13@033308 by Josef Hanzal

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>Josef - I'm interested in this.  Thanks!
>


The 16C74A to 256KB SIMM interface (can easily adapt up to 4 MB)
================================================================

As a primary source of information I used the Motorola Memory Device Data Q3/91.
All comments and explanations are brief, mail me privately if you come to
any dificulties.

In my setup the SIMM draws about 10 mA of supply current.

The setup uses only 8 bits of the SIMM, but the 9 bit versions can be used
with just 2 resistors added (but utilizes still only 8). It can be expanded
to accomodate also 1M and 4M x 8 or 9 bit SIMMs. My version uses portB,
portD, RE0, RC0, RC1, RC2 and one 8-bit latch - 74HC573. From other PIC
peripherals the TMR0 is used for refresh purposes. The PIC runs with 10 MHz
crystal, but this is because of other circuits, the refresh routine uses
only some 7% of the time with safe margin, so lower crystal frequencies can
be used as well. The above calculation is the worst case - based on 8 ms
refresh time. There are also 256KB SIMMs with 64 ms refresh and than the
interrupt can be servised less often or the PIC run at even lower frequencies.

The 74HC573 has its inputs connected to the port D, the latch enable (or
clock) input to RE0, the output enable is grounded. The outputs of latches
are named I0-I7 in the following text. Here are the connections to the SIMM
module:

   SIMM        PIC or HC573
pin#    name
1      VCC     power +5 V
2      CAS     RC0
3      DQ0     RB0
4      A0      I0
5      A1      I1
6      DQ1     RB1
7      A2      I2
8      A3      I3
9      VSS     power 0 V
10      DQ2     RB2
11      A4      I4
12      A5      I5
13      DQ3     RB3
14      A6      I6
15      A7      I7
16      DQ4     RB4
17      A8      RD0
18      A9*     RD1
19      A10**   RD2
20      DQ5     RB5
21      W       RC2
22      VSS     power 0 V
23      DQ6     RB6
24      no connection
25      DQ7     RB7
26      Q8***   no connection
27      RAS     RC1
28      CAS8*** resistor 10 K to +5V
29      D8***   resistor 10 K to +5V
30      VCC     power +5 V

* on 1M SIMM only
** on 4M SIMM only
*** on x9 SIMM only

Registers:
FSR:    used by SIMMWR

Variables:
RASCNT: 1 byte, used during interrupt, cannot be shared
TEMP:   1 byte, used by SIMMWR
SIMM0: the upper address byte
SIMM1: the middle address byte
SIMM2: the lower address byte
SIMM0-2 address range:
0 to 03ffff for 256K SIMM
0 to 0fffff for 1M SIMM
0 to 3fffff for 4M SIMM

Pin definitions
#define _CAS    PORTC,RC0
#define _RAS    PORTC,RC1
#define _W      PORTC,RC2
#define _LE     PORTE,RE0

Peripherals initialization:
portB as input, pullups on
portD as output
RC0,1,2 as outputs, all at HI level
RE0 as output, at LOW level
Timer0 prescaler 32, interrupt enabled (for 10 MHz clock results in < 4 ms
interrupt period)

Before first communication after power up the RAS signal should be cycled 8
times to initialize the dynamic nodes in DRAMS. As an alternative, I would
invoke the refresh by setting the T0IF.

TMR0 interrupt service:

INT:save STATUS and W, select RP0
INTT0:  BCF     _T0IF           ;TIMER 0 INTERRUPT
       MOVLW   D'32'           ;Performes the CAS before RAS refresh, 256
cycles every 4 ms
       MOVWF   RASCNT
I2:     BCF     _CAS            ;of course this can be shortened
       BCF     _RAS            ;and initial RASCNT value increased,
       BSF     _RAS            ;but I still have plenty of EPROM left
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BCF     _RAS
       BSF     _RAS
       BSF     _CAS
       DECFSZ  RASCNT,F
       GOTO    I2
   restore STATUS and W
       RETFIE

       ;WRITE SIMM
       ;ADDRESS IN SIMM0-2
       ;DATA IN W
       ;assumes RP0 is selected
SIMMWR: MOVWF   TEMP            ;store data in temporary location
       BCF     _T0IE           ;disable TMR0 interrupt, so that the
       MOVLW   TRISB           ;refresh does not interfere with write
       MOVWF   FSR             ;make FSR to point to TRISB, avoids bank
switching
       MOVF    SIMM2,W         ;latch lowest address byte in HC573
       MOVWF   PORTD
       BSF     _LE
       BCF     _LE
SW0:    MOVF    SIMM0,W         ;isolate bit 16 of the address
       ANDLW   0x01
       MOVWF   PORTD           ;output it on port D
       BCF     _RAS            ;activate RAS
       MOVF    SIMM1,W         ;latch middle address byte in HC573
       MOVWF   PORTD
       BSF     _LE
       BCF     _LE
SW1:    RRF     SIMM0,W         ;isolate bit 17 of the address
       ANDLW   0x01
       MOVWF   PORTD           ;output it on port D
       BCF     _W              ;activate W
       CLRF    INDF            ;make PORTB output
       MOVF    TEMP,W          ;output data on PORTB
       MOVWF   PORTB
       BCF     _CAS            ;cycle CAS - performs write operation
       BSF     _CAS
       COMF    INDF,F          ;make PORTB input
       BSF     _W              ;deactivate W
       BSF     _RAS            ;deactivate RAS
       BSF     _T0IE           ;enable refresh
       RETURN
       DW      0x3FFF

       ;READ SIMM
       ;ADDRESS IN SIMM0-2
       ;OUTPUT DATA IN W
       ;assumes RP0 is selected
SIMMRD: BCF     _T0IE           ;disable TMR0 interrupt, so that the
                               ;refresh does not interfere with read
       MOVF    SIMM2,W         ;latch lowest address byte in HC573
       MOVWF   PORTD
       BSF     _LE
       BCF     _LE
SR0:    MOVF    SIMM0,W         ;isolate bit 16 of the address
       ANDLW   0x01
       MOVWF   PORTD
       BCF     _RAS            ;activate RAS
       MOVF    SIMM1,W         ;latch middle address byte in HC573
       MOVWF   PORTD
       BSF     _LE
       BCF     _LE
SR1:    RRF     SIMM0,W         ;isolate bit 17 of the address
       ANDLW   0x01
       MOVWF   PORTD
       BCF     _CAS            ;activate CAS
       GOTO    $+1             ;wait for the data to be valid
       MOVF    PORTB,W         ;read data
       BSF     _RAS            ;deactivate RAS
       BSF     _CAS            ;deactivate CAS
       BSF     _T0IE           ;enable refresh
       RETURN
       DW      0x3FFF

The modification for 1M or 4M SIMM involves change in treatment of SIMM0.
The code should be changed as follows (not tested):

1M SIMM, SW0 and SR0:
       MOVF    SIMM0,W
       ANDLW   0x03
       MOVWF   PORTD

1M SIMM, SW1 and SR1:
       RRF     SIMM0,W
       ANDLW   0x06
       MOVWF   PORTD
       RRF     PORTD,F

4M SIMM, SW0 and SR0:
       MOVF    SIMM0,W
       ANDLW   0x07
       MOVWF   PORTD

4M SIMM, SW1 and SR1:
       RLF     SIMM0,W
       ANDLW   0x70
       MOVWF   PORTD
       SWAPF   PORTD,F

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