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'Teaching a Class: Need comparisons to other popula'
1996\05\23@081409 by Thomas Coonan

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    One of the fun tasks I get to do, is teaching short courses on various
    technical subjects to engineers here at SA.  You guessed it - I'm
    doing a short course on the PIC.  I would like to include a quick
    comparison to competing "low end" microcontrollers (AD2100, 8051,
    6805, 6811).  I'm thinking about a fairly quick and unscientific gross
    comparison and not a detailed engineering analysis.  I'd love to hear
    any comments and gut impressions y'all might have ("what? engineers
    with opinions about different processors?").  Here are some short
    notes I have (please, throw rocks at these statements).

    - PIC's one cycle 120ns instruction is pretty fast, especially when
    compared with 8051.  (however, aren't their accelerated 8051
    look-a-likes that *are* as fast as PIC?)
    - Availability (especially through DIGIKEY) is much better than rivals
    like, say, Motorola...
    - If one counted up the numbers of steps to program a PIC at one's
    desk (and $$$) versus the others, the PIC would win...(one could argue
    "so what?" but this is nice for prototyping, at least.
    - PICs prices are pretty competitive (2100s around $10 (?), but 8051s
    can be gotten pretty cheap, right?)
    - My use of PICs has been for very low-end stuff where assembler was
    completely adequete.  My gut feeling is that when you start
    contemplating larger C programs, 68HC11s start looking much more
    manageable.  Maybe new higher-end PICs can dispute this reaction.

    Thanks!

    spam_OUTThomas.CoonanTakeThisOuTspamSciatl.com  (Scientific Atlanta, that is)

1996\05\23@114038 by John Payson

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>      - PIC's one cycle 120ns instruction is pretty fast, especially when
>      compared with 8051.  (however, aren't their accelerated 8051
>      look-a-likes that *are* as fast as PIC?)

Dallas makes a part that runs a clock of 33MHz (I think) and runs "90%" of
instructions in 4 clocks.  Unfortunately, that 90% is only a measure of
opcode space mix, not dynamic or even static instruction mix.  To understand
this, consider that the CPU needs a lot more opcodes for instuctions like

       mov a,r0
       mov a,r1

etc. (one-byte instructions--4 cycles execution) than for

       mov a,#imm
       mov a,direct

(two-byte instructions--8 cycles execution) or

       mov direct,#imm
       mov direct,direct

(three-byte instructions--12 cycles execution).

To be sure, many instructions would require two instructions on the PIC to
replace them, but PIC's handy skip instructions often more than make up for
that; further, the PIC's addition and rotate instructions can operate with
memory as a destination whereas the 8051-clones' cannot.

1996\05\23@131445 by Roger Books

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<bit about 33MHZ processor with different instruction times snipped>

How do you count time on this?  On a PIC you know how many instructions
you have and can get a fair (perfect?) execution time count.  Do you
run through a simulator and hope you catch all the cases?

Roger
(Fortunately, everything I've ever had to do was minimizing instruction
times, not be councerned about using a known time.)

1996\05\24@110328 by Martin McCormick

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       I once wrote a 6502 routine to decode 1200 baud data and found that
the easiest thing to do was to minimize instructions as previously mentioned
and then add adjustable delay loops since it is easy to retune the loops
when you modify the code.

       On a 1 MHZ 6502, 1200 baud got pretty touchy.  I highly recommend any
other way to do this if possible.  It was a real pain, but it would be a
great learning exercise.

Martin McCormick 405 744-7572   Stillwater, OK
OSU Center for Computing and Information services Data Communications Group

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