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'Subroutines placement'
1999\05\03@171909 by Andreas Magnusson

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<DIV><FONT size=2>Hi!</FONT></DIV>
<DIV><FONT size=2></FONT>&nbsp;</DIV>
<DIV><FONT size=2>I have never really understud how to use the subroutines and
the memory in a PIC16F84 correct.</FONT></DIV>
<DIV><FONT size=2></FONT>&nbsp;</DIV>
<DIV><FONT size=2>I knew I have to put subroutines in the lower area of each
memoryblock. How shall I do exactly.</FONT></DIV>
<DIV><FONT size=2></FONT>&nbsp;</DIV>
<DIV><FONT size=2>Can I put a subroutine in the &quot;lower area&quot; and with
a goto instruction go to another place in the memory and continu the routine
there....?... :-?</FONT></DIV>
<DIV><FONT size=2></FONT>&nbsp;</DIV>
<DIV><FONT color=#000000 size=2>And the memory I have read
about&acute;&quot;long calls&quot; and stuff like that where you have to change
the RP0, RP1 status bits. Can't really say I understund anything...</FONT></DIV>
<DIV><FONT color=#000000 size=2></FONT>&nbsp;</DIV>
<DIV><FONT size=2>When do I have to think about the &quot;memory placement&quot;
when I am writing assambles?</FONT></DIV>
<DIV><FONT color=#000000 size=2></FONT>&nbsp;</DIV>
<DIV><FONT color=#000000 size=2></FONT>&nbsp;</DIV>
<DIV><FONT color=#000000 size=2>If anyone want's to explaine this for me I would
be very happy!</FONT></DIV>
<DIV><FONT color=#000000 size=2></FONT>&nbsp;</DIV>
<DIV><FONT color=#000000 size=2>/Andreas Magnusson</FONT></DIV></BODY></HTML>

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1999\05\03@181739 by Mike Keitz

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On Mon, 3 May 1999 23:22:55 +0300 Andreas Magnusson <spam_OUTandreas.mTakeThisOuTspamTELIA.COM>
writes:

>I knew I have to put subroutines in the lower area of each
>memoryblock. =
>How shall I do exactly.

In a 16F84 or other 'mid range' PIC, subroutines may be placed anywhere
and accessed with a 'CALL' instruction  The 'lower area' restriction
applies only to 'low end' PICs like the 16C5x and 12C50x.  In these
chips, the CALL instruction's range is more limited than the GOTO
instruction.


>And the memory I have read about=B4"long calls" and stuff like that =
>where you have to change the RP0, RP1 status bits.

In the 'mid range' line, long calls and page bits are only necessary on
PICs with more than 2K words of program space.  The 16F84 has 1K, so they
are not needed.  Again the situation is different on 'low end' models,
but 16F84 users don't need to worry about it.


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1999\05\04@034748 by Dr. Imre Bartfai

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Hi,
what you wrote is not a concern for 16C84 generally except using table
read. You can put subroutines wherever you want, with one exception:
if you modify PCL, then the memory address should be in the 1st half of an
512-byte page.

RP0 selects memory bank (nothing to do with program memory), and RP1 is
unused.

I guess your information may have been intermixed with that for 16C5x
chips.

I hope this helps.
Imre


On Mon, 3 May 1999, Andreas Magnusson wrote:

{Quote hidden}

1999\05\04@062506 by Caisson

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Van: Andreas Magnusson <.....andreas.mKILLspamspam@spam@TELIA.COM>
Aan: PICLISTspamKILLspamMITVMA.MIT.EDU
Onderwerp: Subroutines placement
Datum: maandag 3 mei 1999 22:22

> Hi!

Hello Andreas,

> I have never really understud how to use the subroutines and the memory
in a PIC16F84
> correct.

> I knew I have to put subroutines in the lower area of each memoryblock.
How shall I do
> exactly.

This is only true for Scenix controllers.  It does not apply to MicroChip
controllers.

> Can I put a subroutine in the "lower area" and with a goto instruction go
to another place
> in the memory and continu the routine there....?... :-?

Yes.  you can.  But remember that the sub-routine _has_ to end _somewhere_
with a Return.  You could call a Subroutine, jump a number of different
ways according to the contents of the W-register ( Case X - select) and end
every "branch" with a Return.

> And the memory I have read about«"long calls" and stuff like that where
you have to
> change the RP0, RP1 status bits. Can't really say I understund
anything...

If you look at the Call-instruction you can see that the instruction itself
provides the 11 lower-bits of the Target-address.  The PCLATH provides the
2 upper-bits.  But with an address of 11 bits you have an Address-space of
2048 words of code.  That's twice as much reach than the `84 has !  So, you
can Call (and Goto) anywhere in the Code-memory of the `84 without changing
anything in the PCLATH register.

> When do I have to think about the "memory placement" when I am writing
assambles?

That pop's up it's ugly head when using the PCL register for indirect jumps
(mostly into a Table).  The PCL-register can hold only 8 bits of an
address, so the rest of the address will have to come from elsewhere.  So,
if you add a value to the PCL register it will "wrap-around" within a page
of 256 code-words.  But there is something more you will have to take heed
to.  I said that "the rest of the address will have to come from
elsewhere".  Where does it come from ?  Well, it comes from the PCLATH
register.  This means that if you want to reach a target-address in some
"page" of 256 code-words by way of changing PCL, you will have to load
PCLATH with that "page" -number.

> If anyone want's to explaine this for me I would be very happy!
>
>/Andreas Magnusson

Greetz,
 Rudy Wieser

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