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PICList Thread
'SLEEP'
1997\04\24@121235 by Ed Todd

picon face
We use 16C57 with 1 second sleep periods for an application.  On wakeup, we
test if a pin has gone high.  It works fine, the only limitation is that
the line must stay high for a minimum of 1 second.  If that isn't true for
your application, you can either use another chip with interrupt on port
capability (costs a bit more than a 57) or external circuitry to hold the
line high for a second.  If you expect several pulses during a sleep
period, you will need some sort of adder.
 <spam_OUTedtoddTakeThisOuTspamsni.net>    Ed Todd


'Sleep'
1999\05\30@011904 by Sean Breheny
face picon face
Hi All,

Thanks in advance for any help you can give me with a problem I am having:

I am trying to use the ADC on a 16C71 and I am getting an error of as much
as 2 LSB (when the datasheet says +/- 1 LSB max). I am measuring the
voltage directly between the ADC pin and the PIC's Vss pin and the output
code seems to be off. I am waiting about 800 uS from the time I enable the
ADC until I begin the conversion, and the output impedance of my source is
2.2K

Now as to the reason why this is entitled "SLEEP": AS recommended in the
datasheet, I am placing the pic in sleep mode during the ADC,using the
internal RC oscillator for the ADC. My normal oscillator element is a 4MHz
xtal with 20 pF load caps. When I observe the pic's oscillator pins with my
scope (about 20pF loading with my x10 probe),instead of seeing the
oscillator exponentially decay to zero during sleep (as I would expect), I
see the DC level increase slightly and the the amplitude remain constant.
This region of the waveform is about 50 uS long after which there is a
small glitch and then the DC level returns back to the same as before
sleep. Is this normal for sleep mode? I thought the whole idea was to
disable the oscillator (and other internal PIC circuits) to prevent digital
switching noise! Perhaps the xtal's Q is so high that it won't even begin
to decay in only 50uS? (This is my guess, since 50uS is only a few 100
cycles at 4MHz,BUT if this is the case,are we loosing some of the benefit
of sleep mode?)

I know that 2 LSB error isn't that bad,but in my case,it is really annoying
because the actual ADC count gets multiplied by 7 before being displayed on
an LCD display. SO, if I calibrate it to be correct in one portion of the
scale, I get as much as 14 or sometimes even 21 counts (after being
multiplied by 7). Yeah, I know,an 8 bit ADC on a ucontroller is not a
really precision device and multiplying by 7 is making things worse,but I
think I could live with 1 LSB of error more easily. MORE IMPORTANTLY, I
want to make sure I am not doing something dumb with the sleep mode.

Thanks,

Sean


|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
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1999\05\30@043937 by g.daniel.invent.design

flavicon
face
Sean,
1)      if another interupt (WDT, external pin change, eeprom write)
completes then the PIC will wake again. (this would include pending
interupts caused during an A2D service interupt)   If you RTFM then you
wil find more relevent answers.

2)      you must provide adequate sample time for the internal A2D
capacitance to aquire the input voltge, this is lengthened for high
resistance path between A2D & sense voltage.   Rapid sequential scaning
of multiple chanels will provide some charge sharing between the sampled
chanels.

3)      you must enable the on chip A2D oscilator.

4)      the voltage reference for the A2D is often the PIC's VCC, is this
stable to within significantly less than your error value ?

5)      for long term stability it is worth noting that a 7805 regulator can
significantly alter it's "regulated" output voltage as it's temperature
changes, good heatsinking will minimise this.

Sean Breheny wrote:
{Quote hidden}

--
Steam engines may be out of fashion, but when you consider that an
internal combustion engine would require recovery of waste heat by
transfer just before top dead centre then fashion becomes rather
redundant, USE STRATIFIED HEAT EXCHANGERS ! and external combustion.

You heard it first from: Graham Daniel, managing director of Electronic
Product Enhancements.
Phone NZ 04 387 4347, Fax NZ 04 3874348, Cellular NZ 021 954 196.

1999\05\30@063056 by MEDICINTEKNIK KB

picon face
Hi

There is are are a few errors on the older 16C71 silicons that you might have bumped into. One error is the RA4 not operating properly, and one is the sleep mode (I don't rercall the other errors, and am too lazy to look it up for you; sorry).

If you use an old version (that is not the 16C71A or 16C711), you need to stop the oscillator from sponaneous actions  by putting 10 Meg across the XTAL-pins. Or much better: use a 16C711 ! As I remember, this would apply in RC-mode - but I suggest you try it anyway.

Hope I contributed


Sven
-----Ursprungligt meddelande-----
FrŒn: Sean Breheny <.....shb7KILLspamspam.....CORNELL.EDU>
Till: EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU <PICLISTspamspam_OUTMITVMA.MIT.EDU>
Datum: den 30 maj 1999 07:19
€mne: Sleep


{Quote hidden}

1999\05\31@013458 by Sean Breheny

face picon face
Hi Graham,

Thanks for your reply. Please see my comments below:

At 08:35 PM 5/30/99 +1200, you wrote:
>Sean,
>1)      if another interupt (WDT, external pin change, eeprom write)
>completes then the PIC will wake again. (this would include pending
>interupts caused during an A2D service interupt)   If you RTFM then you
>wil find more relevent answers.

Yes, I suppose I wasn't being clear. I'm NOT surprised that the PIC is
coming out of sleep. It is supposed to do so,when it completes the ADC
conversion. What I AM surprised at (or at least was surprised) is that the
oscillator SEEMS to continue to run (although with a different DC bias
level) during sleep (which only lasts 50uS,which seems about right for the
conversion length).

>
>2)      you must provide adequate sample time for the internal A2D
>capacitance to aquire the input voltge, this is lengthened for high
>resistance path between A2D & sense voltage.   Rapid sequential scaning
>of multiple chanels will provide some charge sharing between the sampled
>chanels.

Yes, I am aware of this,and my code already waits 800 uS between enabling
the ADC channel (begin of S&H) and the start of the conversion. This is
about 20 times longer than the minimum wait time stated in the datasheet.

>
>3)      you must enable the on chip A2D oscilator.

Once again,I am already doing that.

>
>4)      the voltage reference for the A2D is often the PIC's VCC, is this
>stable to within significantly less than your error value ?

Good question. As far as DC goes, it is staying exactly at 4.98 volts. As
for AC,it turns out that there is some power supply line noise, BUT it goes
down to a very low level (< 10mV) when in sleep.

>
>5)      for long term stability it is worth noting that a 7805 regulator can
>significantly alter it's "regulated" output voltage as it's temperature
>changes, good heatsinking will minimise this.

Thanks for the tip. I am using a 7805 but as I said above, my meter always
says 4.98 when connected to Vdd.

Perhaps I should restate my problem a bit. I really have TWO questions: #1)
I am seeing an ADC behavior as follows: if I apply a voltage of,say,2.00
volts to the ADC, I might get a code of 102, as expected. HOWEVER, if I
apply 4.00 volts, I might get 206 instead of 204. I guess that this might
simply be my meter not being exact and in fact the voltage I applied
originally was on the verge of giving a 103 count, BUT I see the behavior
even at low voltages (1.5V or so) where my meter has much greater
resolution (1.500 V).

Question #2) When the PIC is placed in sleep, the ADC conversion begins and
this only lasts 50uS. During this 50uS,the xtal apparently doesn't have a
chance to stop oscillating. Is this a normal behavior? My guess was yes,
given that the xtal could easily have a Q of several hundred,AND 50uS is
only about 200 cycles at 4MHz. If it IS normal, does sleep still decrease
switching noise during this 50uS? I guess the PIC internally prevents the
ringing xtal from clocking it,but I am just wondering.

Thanks,

Sean


{Quote hidden}

| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
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1999\05\31@013720 by Sean Breheny

face picon face
Hi Sven,

Thanks for your response. I will take a look at the newest datasheet and
errata to see about those problems. Off hand, I don't know which revision I
am using,and the chip isn't here as I type so I can't look.

I tried even a 100K resistor across the xtal pins and all it did was
slightly decrease the overall amplitude of the oscillation, it didn't alter
the characteristics during sleep.

Thanks for your help,

Sean

At 12:32 PM 5/30/99 +0200, you wrote:
>Hi
>
>There is are are a few errors on the older 16C71 silicons that you might
have bumped into. One error is the RA4 not operating properly, and one is
the sleep mode (I don't rercall the other errors, and am too lazy to look
it up for you; sorry).
>
>If you use an old version (that is not the 16C71A or 16C711), you need to
stop the oscillator from sponaneous actions  by putting 10 Meg across the
XTAL-pins. Or much better: use a 16C711 ! As I remember, this would apply
in RC-mode - but I suggest you try it anyway.
{Quote hidden}

| Sean Breheny                  
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student  
\--------------=----------------
Save lives, please look at http://www.all.org
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1999\05\31@024249 by g.daniel.invent.design

flavicon
face
Sean Breheny wrote:
<<cut>>
> What I AM surprised at (or at least was surprised) is that the
> oscillator SEEMS to continue to run (although with a different DC bias
> level) during sleep (which only lasts 50uS,which seems about right for the
> conversion length).

The data book says that the PIC stops driving the oscilator pin during
sleep.   For a CMOS technology this means that there will be very little
loading on the crystal from this time onwards, if you have a good
osciliscope then as you say, 50 uS may not be sufficient time to
significantly damp the oscilations.   The power up timer bit in config
gives 72 mS before reset finishes, 144 x more than your sample period !

regards,
Graham Daniel.

1999\05\31@072824 by mlsirton

flavicon
face
Hi,

On 30 May 99 at 1:17, Sean Breheny wrote:
<snip>
> I know that 2 LSB error isn't that bad,but in my case,it is really annoying
> because the actual ADC count gets multiplied by 7 before being displayed on
> an LCD display. SO, if I calibrate it to be correct in one portion of the
> scale, I get as much as 14 or sometimes even 21 counts (after being
> multiplied by 7). Yeah, I know,an 8 bit ADC on a ucontroller is not a
> really precision device and multiplying by 7 is making things worse,but I
> think I could live with 1 LSB of error more easily. MORE IMPORTANTLY, I
> want to make sure I am not doing something dumb with the sleep mode.

I don't think your noise is related to the oscillations not
stopping....
Just a few ideas:
1. Try reducing your Vcc noise (Try bypassing with 22uF, 0.1uF and
0.01uF both before the regulator and after).  Place 0.1uF near your
PIC's Vcc (and to its ground).
2. Use a ground plane if possible.
3. Route your analog input away from high speed signals to reduce
coupled noise.
4. Filter your analog input (at least with an RC filter, best with
an active filter).
5. Use some form of digital filtering to get rid of more noise (if
you can sample quicker than your analog signal bandwidth.)

I see no reason why you shouldn't be able to get the noise below
1LSB...

I hope this helps,
Guy - RemoveMEmlsirtonEraseMEspamEraseMEinter.net.il

1999\05\31@162514 by Richard Prosser

flavicon
face
I may be off track - but you're saying you have low noise in sleep mode -
but isn't this is during the A/D conversion period - not the sampling time?
Sorry if I've got this wrong.

Richard

{Quote hidden}

1999\05\31@173657 by paulb

flavicon
face
Sean Breheny wrote:

> I am seeing an ADC behavior as follows: if I apply a voltage of, say,
> 2.00 volts to the ADC, I might get a code of 102, as expected.
> HOWEVER, if I apply 4.00 volts, I might get 206 instead of 204.

 OK, I don't see the problem!  102 means 102 +/- 1 which means it could
easily be 103.  Twice 103 is 206, which is what you get.  No problem!

 If you want to make the FSD match, you need a tweakable reference.  If
you want zero to match, you need a tweakable ground.  If the results you
get are stable and repeatable, the ADC has fulfilled its mission.
Absolute accuracy is another thing again.

 I think you've got enough answers regarding the crystal.
--
 Cheers,
       Paul B.

1999\05\31@183546 by Sean Breheny

face picon face
Hi Richard,

Well, yes, you are right. I guess the point is that the S&H cap will tend
to average out small amounts of noise during the sampling time, BUT we
don't want power supply noise to throw off the reference during the actual
A/D conversion. I think that is the point of putting the PIC in sleep.

Sean

At 08:22 AM 6/1/99 +1200, you wrote:
>I may be off track - but you're saying you have low noise in sleep mode -
>but isn't this is during the A/D conversion period - not the sampling time?
>Sorry if I've got this wrong.
>
>Richard

|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
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1999\05\31@184207 by Richard Prosser

flavicon
face
Good enough - but you're not going to get mush averaging of a 50 or 100Hz
(etc.) power line noise in a 800uS sampling period - unless you sample
synchronously with the mains!

Richard
> {Original Message removed}

1999\05\31@185627 by Sean Breheny

face picon face
Hi Paul,

Well,here is my expectation of the ADC, please tell me if it is unrealistic:

I have a pot as a voltage divider on my input,when I then feed through an
op-amp, whose output goes to the PIC's ADC pin thru a 2.2K resistor (to
protect the PIC/op-amp in case the PIC pin became an output). I expect that
I should be able to adjust the pot and the op-amp gain to provide a certain
division ratio of the input (to effectively raise the max ADC input voltage
by a factor of about 3.5, to about 17.5v). Now, if I put in an input to the
whole system of EXACTLY 2.00 volts, and I get a certain code, I expect to
be able to get twice that code (+/- 1) when I EXACTLY double the input to
the entire system. I know that the op-amp/pot aren't introducing any
offsets,etc., because I measure the voltage at the PIC's ADC input and the
input to the entire system and it is exactly what I expect.

In other words, the ADC's transfer function should be a straight line which
crosses at the origin. INSTEAD, it appears to deviate from this such that
doubling the input doesn't exactly double the output. NOTE also, that no
matter what I set the division ratio to(with the POT), I cannot compensate
for this.

This "system" is supposed to be a voltmeter to measure a voltage in the
range of 2v to 17.85v,built into a power supply. The input is electrically
divided by about 3.5 and then digitally multiplied by 7,to produce a 16-bit
number in the range 200 to 1785.If I set the meter to read correctly at mid
range (9.75v), by the time I get up to 17v I might read 16.87 and if I go
down to 2v, I might read 2.17v. 70mV off is OK, but by the time you get to
140mV or 210mV, you could easily exceede the 5% power supply tolerance of
many components. If I set it to be correct at 2v, I am way off at 17v
(might read 16.45), which suggests to me that the total system "slope" is
not one (I don't get an increase of 1V on the display for 1V on the input)
OR there is an offset, YET, when I measure the actual input the the PIC's
ADC, that is exactly what it should be, so the gain error is not in the pot
or op-amp,so I concluded it must be in the PIC's ADC.

As I say, it is not that I want any particular voltage to be exact, I just
want the overall deviation to be less than 70mV at all points, and it seems
to me from the datasheet's claim of +/- 1 LSB error max, I should be able
to do that.

Thanks for your help and please tell me where I am going wrong,

Sean

At 07:35 AM 6/1/99 +1000, you wrote:
{Quote hidden}

| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
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1999\05\31@185840 by Sean Breheny

face picon face
Hi again Paul,

Actually, I am still wondering one thing about the xtal: If the xtal is
still ringing, does this clock the PIC in any way? I realize that execution
of instructions is halted,but what about power consumption and switching
noise?

Sean

At 07:35 AM 6/1/99 +1000, you wrote:
>  I think you've got enough answers regarding the crystal.
>--
>  Cheers,
>        Paul B.
>
|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
Save lives, please look at http://www.all.org
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1999\05\31@190044 by Sean Breheny

face picon face
True, but the noise I am referring to (and the ONLY noise which will be
reduced by sleep) is the PIC's own generated digital switching noise and
oscillator output,which will be in the megahertz range,usually.

Sean

At 10:40 AM 6/1/99 +1200, you wrote:
>Good enough - but you're not going to get mush averaging of a 50 or 100Hz
>(etc.) power line noise in a 800uS sampling period - unless you sample
>synchronously with the mains!
>
>Richard
>> {Original Message removed}


'Sleep'
1999\06\01@010920 by paulb
flavicon
face
Sean Breheny wrote:

> Now, if I put in an input to the whole system of EXACTLY 2.00 volts,
> and I get a certain code, I expect to be able to get twice that code
> (+/- 1) when I EXACTLY double the input to the entire system.

 What I was pointing out was that to do this, you made two measurements
*each* of which is +/- 1 LSB.  If then your lower measurement is 1 LSB
lower than actual, the "actual" is in fact 1 LSB *higher* than the
reading.  You double the "actual" so this is now 2 LSB high and read it.
If in the process, it reads 1 LSB high, then your reading is now *three*
counts higher than you expected, all due to measurement error.

 That's one error count from *each* measurement and one from the
doubling process.

 You were looking from the wrong end.  Calibration is always performed
as close as possible to full scale.  Accordingly, what you must look at
is say, the measurement at 4.00V, then halve it and see how close to the
reading for 2.00V you are.  Allow 1 LSB for each measurement, and your
original examples (206/2 = 103 ~= 102) are dead on!

> In other words, the ADC's transfer function should be a straight line
> which crosses at the origin. INSTEAD, it appears to deviate from this
> such that doubling the input doesn't exactly double the output.

 Have you actually plotted it?  I suspect if you do, it'll look quite
good, at least in terms of linearity...

> This "system" is supposed to be a voltmeter to measure a voltage in
> the range of 2v to 17.85v, built into a power supply.  The input is
> electrically divided by about 3.5 and then digitally multiplied by
> 7, to produce a 16-bit number in the range 200 to 1785.

 OK, resolution of the ADC is 20mV per bit, multiply by 3.5, you get
70mV.

> If I set the meter to read correctly at mid range (9.75v),

 But by doing so, you only get half accuracy.  Calibration is always
performed at full-scale, at least if you want to utilize the full
resolution.

> by the time I get up to 17v I might read 16.87

 That's 130mV error, within the statutory two bits of error (one for
the calibration measurement, one for the final).

> and if I go down to 2v, I might read 2.17v.

 You haven't mentioned a zero null on your divider yet.  You've just
said it reads low at high output, high at low output.  That error is
linear, telling you your zero is not nulled.  If it read high in the
middle, low at each extreme, *then* you'd have non-linearity.

> 70mV off is OK, but by the time you get to 140mV or 210mV, you could
> easily exceede the 5% power supply tolerance of many components.

 200mV is 5% of 4 volts.  What component has a 5% power supply
tolerance at 4V praytell?

> If I set it to be correct at 2v, I am way off at 17v

 *Not* smart.  See above.

> YET, when I measure the actual input the the PIC's ADC, that is
> exactly what it should be, so the gain error is not in the pot

 Fine.

> or op-amp,

 Maybe not...  All analogue returns are made directly to the PIC's
ground pin, aren't they?

> so I concluded it must be in the PIC's ADC.

 May well be.

> Thanks for your help and please tell me where I am going wrong,

 Fit an offset adjustment to the op amp.  Recursively calibrate the
offset at 2.03V and the gain at 17.78V until satisfaction is achieved!
--
 Cheers,
       Paul B.

1999\06\02@020252 by Sean Breheny

face picon face
Well, actually, I decided to go and fool with it some more before engaging
my mouth here again, and I found out that the whole problem was noise on
the ADC input line. Apparently,there is some coupling from the OSC pins
(which are right next to AN0), and placing the 2.2K resistor in the line
isolated it enough from the op-amp's output to allow sufficient coupling to
give an additional LSB of error. Placing a 0.1 uF cap from the ADC in to
GND formed a LPF with the 2.2K resistor and my accuracy is EXCELLENT now,
even better than +/- 1 LSB.

One additional question while I'm at it ;-), in the datasheet, it says that
the first transition is at Vref/256. Lets make the discussion simpler by
talking about a 2 bit ADC with a Vref of 4. If it followed the same rule,
its first transition would be at 1 volt. This would mean that a code of
"01" would not occur until the input was at least 1 volt and it could be as
high as just under 2v without it switching to a code of "10". This seems to
me like a max. quantization error of +1 LSB. If you instead made the
transition at (Vref/256)*0.5 and then the next at (Vref/256)*1.5,then a
code of "01" would translate to a voltage between 0.5 and 1.5 volts, giving
a max quant. error of +/- 0.5 LSB, and a max absolute value of quantization
error of only 0.5 as opposed to 1 as before. Wouldn't this be better?

Thanks again,

Sean


At 03:05 PM 6/1/99 +1000, you wrote:
{Quote hidden}

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