Re single steps
It would seem that the PIC tests the state of the interrupts during one of
the first phases of the internal clock, and thus does not perfrom the next
instruction before going back into the interrupt routine.
Thus now comes the problem "How to do it". It has been suggested that a
counter be placed on the OSC line, yuck! I have decided that I will use the
internal timer to schedule an interrupt, 8 clock cycles after the last
instruction in the routine. An external pin will be used to indicate a
single step (debounced with a F/F). To activate the S/S the code will enable
the timer interrupt and a NOP will be placed after the enable instruction,
thus from that point on I will be able to see I/O use, great for debugging!
I will let you all know how it goes!
TONY NIXON 54964
If I remember correctly, someone was trying to single step code with
Couldn't you achieve this by using a monostable on the OSC1 line
connected to a push button. I guess you could also send it a stream
of 'X' bits to speed things up a little.
Just a thought.
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At 09:13 AM 2/06/98 +1000, you wrote:
Yes, I was looking at single stepping, but I wanted to do it with no
external hardware on the clock control other than a debounced step button,
and I was looking st how to control this internally. This I have done!. As
for your suggestion, yes, this will work, but need to clock 4 times for each
Dennis Plunkett: Embedded Hardware, Software design
NEC Australia DRMASS
ph 03 9264-3867
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