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'Sharing Address Lines with Data.'
1999\10\08@201542 by David Blain

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<DIV><FONT face=Arial size=2><SPAN class=252571000-09101999>I have a need to
share 8 address lines with 8 data lines.&nbsp; I think I need a 8-bit latch but
I don't know what kind.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=252571000-09101999></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=Arial size=2><SPAN class=252571000-09101999>I keep seeing D-type
Latch's, and Line Buffers, and flip flops, but don't know the difference between
them.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=252571000-09101999></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=Arial size=2><SPAN class=252571000-09101999>Can someone
recommend a part that would allow me to do what I need?</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=252571000-09101999></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=Arial size=2><SPAN class=252571000-09101999>A newbe striving to
be more :-).</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=252571000-09101999></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=Arial size=2><SPAN
class=252571000-09101999>David.</SPAN></FONT></DIV></BODY></HTML>

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1999\10\08@202419 by Keith Causey

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1999\10\09@190206 by paulb

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> David Blain wrote:

> I have a need to share 8 address lines with 8 data lines.  I think I
> need a 8-bit latch but I don't know what kind.

> I keep seeing D-type Latch's, and Line Buffers, and flip flops, but
> don't know the difference between them.

 OK then, there are three devices that you may encounter:

1} Line Driver.  This buffers the line, may also invert the data, and
has a tri-state "enable" line (ÍE).  Whilst enabled, the output tries to
(within speed limits) follow the inputs.  When disabled, it goes open-
circuit.

2} D-type latch.  Has a Latch Enable.  Whilst enabled, the output
follows the input.  The moment the Enable goes false, the outputs hold
their data.  That is, the outputs hold the data that was present at the
moment the latch enable dropped.  May *also* have an Output Enable as in
the above 1}.

3} D-type Flip-Flop.  Generally edge-triggered.  Again, the outputs
hold the data that was present at the moment the clock input dropped (in
the requisite direction).  The difference here is that when the clock
goes high again, it *still* holds the previous data whereas the latch
will show the new data.  Likewise may have Output Enable.

 For an Address Bus, you usually want the address to be valid as *soon*
as possible, and therefore usually use the latch, not the Flip-Flop.

> Can someone recommend a part that would allow me to do what I need?

 From my favourite (but ever-moving, ever mutating and frame-infested)
page, http://www.st.com/stonline/books/toc/ds/167.htm try the 74HC373.
--
 Cheers,
       Paul B.

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