'SX100 - will the history repeat ?'
I have just run accross the new Scenix 100MHz chip advanced information. It
will certainly allow the use of less effective (in means of code space and
execution time) higher level languages and development tools, which will on
the other hand allow to bring the product on the market faster.
Except the clock speed it looks like the already available 50MHz chip.
The followint is copied from the Scenix document:
- 100 MIPS performance at 100 MHz and Vcc=5.0V
- 2048 x 12 bits EE/Flash program memory rated for 10,000 rewrite cycles
- 136 x 8 bits SRAM
- In-system programming capability through OSC pins
- Internal RC oscillator with configurable rate from 31.25KHz to 4 MHz, +8%
- Analog comparator
- Brown-out detector (4.2V, on/off)
- Multi-Input Wakeup (MIWU) on eight pins
- All outputs capable of sinking/sourcing 30 mA
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