'SPI code for BS2 (other) interface'
I want to interface a BS2 to a PIC 16f84 via the BS2 shiftin/out command,
using a clock to synchronize bit transfer. I have used the BS2 to talk to a/d
converters and other using SPI interface. Now I want to create a PIC assembly
routine that can be on the receiving end.
Does anyone have some SPI or similar source code that shows how to do this?
I have asked before with no luck, it must be regarded as "precious". I know
the BS2 pulses the clock line for 14us then waits 46us for the next pulse. The
clock pulses are used to synchronize the bit transfer. I haven't found
anything on the web.
Any help or direction appreciated.
Dr. Imre Bartfai
here is a routine I use to receive the SHIFTOUT-ed data from the other
' This program receives a binary byte sent by SHIFTOUT (MSB first)
' and displays it as decimal value on three 7-segment LED display.
' The order is 100, 10, 1, i. e. ones send first.
' They are driven by three daisy-chained 74164 ICs. The data
' coming by another shiftout. The input Clock is RB.0, input Data
' is RB.1
' As a special feature, a timeout for spurious clock pulses is
' also implemented.
' The transparent mode flag is always on, and a rescaling will be taken.
' DEVICE 16C622
DEFINE OSC 16
RCVD VAR BYTE 'the byte received
RDY VAR PORTB.2 'the Ready Flag
DIN VAR PORTB.1 'DATA_IN
CLK VAR PORTB.0
RDYLED VAR PORTA.4 'the Ready LED
DP100 VAR PORTA.2
DP10 VAR PORTA.1
DP1 VAR PORTA.0
TRNP VAR PORTB.3 'Transparent Mode flag
COUT VAR PORTB.6
DOUT VAR PORTB.7
TEMP VAR BYTE 'temporary for EMIT
CTR VAR BYTE 'the bit counter
TEMPW VAR WORD 'temporary rescaled value
em_1 var byte 'byte to be shift out
OPTION_REG = %11000100 'TMR0 prescaled w/32 = 3.2 msec at 10 MHz
TRISB.2 = 0 'Ready Flag as Output
RDY = 1 'at start not ready
CMCON = %00000111 'turn all comparators off (622)
TRISA = %11101000 'Ready Led & DP's as Output
PORTA = 0 'D.P. test
EM_1 = 0 'full zero: '8'
PORTA = %00000111 'clear D.P.'s
EM_1 = $3 '0'
movlw 8 ; prepare receive routine
ClkWait ; main receiving routine
btfss _CLK ; Wait for Clock
bsf _RDY ; receiving begun
ClkLo btfsc _CLK ; Wait for Clock
goto Rcvr ; CLKHI received
movf TMR0,W ; check for TimeOut
andlw 80h ; overflow test
btfss STATUS.Z ; skip if zero
Rcvr bcf STATUS.C ; clear carry
btfsc _DIN ; copy DIN into Cy
rlf _RCVD ; into Received
ClkHi btfsc _CLK ; now wait for Clock low
goto ClkHi ; no Wdt needed!
decfsz _CTR ; loop
The result is now in _RCVD
I made a h/w handshake to signal the sender I'm ready to receive: it is
the _RDY line.
On Fri, 19 Jun 1998, <Nichole Petty> wrote:
More... (looser matching)
- Last day of these posts
- In 1998
, 1999 only
- New search...