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'SPI and Microwire'
1998\11\28@165513 by Morgan Olsson

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I thougt it was the same (shift register technique)

Now i see that Mchip have different SPI and Microwire EEPROMS
And also there seem to be different modes in SPI

What is the difference?

Does anyone know where to get the specs?

(Tried Mchip search but their server returns a 500 error)

/Morgan
       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
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1998\11\29@073347 by Adriano De Minicis

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> Now i see that Mchip have different SPI and Microwire EEPROMS
> And also there seem to be different modes in SPI
> What is the difference?

Hi Morgan,

A good tutorial on the differences between SPI, Microwire and
I2C EEPROMs is "Using Serial EEPROMs" by Jan Axelson, on Circuit
Cellar Ink #84 (July 1997).

There is also a second part (CCI #85) describing a project of
an EEPROM programmer connected on the parallel port of a PC,
complete with VB code that can be downloaded from the CCI site:
ftp://ftp.circuitcellar.com/CCINK/1997/Issue_85/SEEPROM.ZIP

If I recall correct, the main differences between SPI and Microwire
are:

- Chip Select:
 SPI is active low.
 Microwire is active high and the master must deactivate CS after
 each instruction (except sequential reads)

- Clock edge:
 SPI and Microwire both write bits (EEPROM SO/DO line) on the
 rising edge of the clock, but they differ when reading bits
 (EEPROM SI/DI line): SPI latch data on the FALLING edge of the
 clock, while Microwire on the RISING edge.
- There are also other (small?) differences in the protocol

Adriano

1998\11\29@092518 by marc

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Adriano De Minicis wrote:

{Quote hidden}

1998\11\29@125224 by Peter L. Peres

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On Sat, 28 Nov 1998, Morgan Olsson wrote:

> I thougt it was the same (shift register technique)

Microwire is (C) [pat] [tm] Motorola, whereas SPI is an acronym that
cannot be patented...

> Now i see that Mchip have different SPI and Microwire EEPROMS
> And also there seem to be different modes in SPI

Not just Microchip but many others have different modes of SPI (including
Motorola).

> What is the difference?

There are three kinds of major differences: edge/level signalling,
positive/negative logic, and addressing.

The edge/level problem applies to ~SS especially, i.e. sometimes it is ok
to pulse ~SS after sending the required no. of clocks, or it has to be H
or L during all this time. There are also parts that clock in on the
high-going edge etc.

The addressing refers to the fact that some SPI part manufacturers choose
to address distinct functions in a chip by the number of clock pulses
until ~SS is (un)asserted. Motorola is one of these BTW.

> Does anyone know where to get the specs?

The Microwire specs are available on Motorola's site, I think as a part of
some HC11 (?) processor's data sheet. They will not do you a lot of good
if you work with other manufacturer's parts.

A reasonably flexible SPI library needs:
- Programmable ~SS and SCK polarity
- ~SS programmable as strobe pulse or enable
- Capacity to send or receive 1-N bits of data (yes, in increments of 1)

hope this helps,

Peter

1998\11\29@180500 by mkeitz

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On Sun, 29 Nov 1998 18:56:48 +0000 "Peter L. Peres" <.....plpKILLspamspam@spam@ACTCOM.CO.IL>
writes:
>On Sat, 28 Nov 1998, Morgan Olsson wrote:
>
>> I thougt it was the same (shift register technique)
>
>Microwire is (C) [pat] [tm] Motorola, whereas SPI is an acronym that
>cannot be patented...

"Microwire" is National's TM.  "SPI" is Motorola's name.  Neither seems
to have has been too actively sueing other manufacturers for re-using
their names.


>The addressing refers to the fact that some SPI part manufacturers
>choose
>to address distinct functions in a chip by the number of clock pulses
>until ~SS is (un)asserted. Motorola is one of these BTW.

Motorola I think first used this feature and named it "BitGrabber" TM.
The number of pulses is always a multiple of 8 though.  That to me seems
to be the major difference: SPI devices try to group the data into bytes
of 8 because the SPI master hardware in Motorola processors always sends
8 bits at a time.  Microwire devices are harder to deal with because they
send various lengths of data.  For example to upgrade from a 93C46 to
93C56 EEPROM would require modifying the sending routine to send an
additional bit of address.


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1998\11\30@131853 by Peter L. Peres

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On Sun, 29 Nov 1998 mkeitzspamKILLspamJUNO.COM wrote:

> On Sun, 29 Nov 1998 18:56:48 +0000 "Peter L. Peres" <.....plpKILLspamspam.....ACTCOM.CO.IL>
> writes:
> >On Sat, 28 Nov 1998, Morgan Olsson wrote:
> >
> >> I thougt it was the same (shift register technique)
> >
> >Microwire is (C) [pat] [tm] Motorola, whereas SPI is an acronym that
> >cannot be patented...
>
> "Microwire" is National's TM.  "SPI" is Motorola's name.  Neither seems
> to have has been too actively sueing other manufacturers for re-using
> their names.

Ok, it looks more confused from here (far away) ;). Thank you for putting
it right.

{Quote hidden}

Actually imho Microwire is easier to deal with because you do not have a
table of commands AND lengths, instead you use a table of lengths only. At
least on very small micros.

BTW there is at least one Motorola device that is message-length addressed
(a la Microwire) that I know well: MC145171, and they're not 8 bit
multiples either. So that much for being consequent. I wonder how one can
program a HC?? SPI master to talk to it (I used a PIC ;).

Peter


'SPI and Microwire'
2000\02\04@101121 by Michael Rigby-Jones
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Does anyone have a pointer to an official spec. for the above bus protocols?
I've looked around Motorola's and Nat Semi's site without much luck.

Cheers

Mike

2000\02\04@110411 by Nick Taylor

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Michael Rigby-Jones wrote:
>
> Does anyone have a pointer to an official spec. for the above bus protocols?
> I've looked around Motorola's and Nat Semi's site without much luck.
>
> Cheers
>
> Mike

Mike ... if you find the "official specs.", please post the URL
to the list.

Thanks,
- Nick -

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