At 09:19 AM 5/17/96 -0400, you wrote:
This is straying pretty far from a straight PIC discussion, but
I felt a few more comments may help those trying to interface
FETS to PICs sucessfully
{Quote hidden}>
>Scott Dattalo wrote:
>
>
>>Again, in my experience with switching power supplies of this type,
>>you want to have very hard MOSFET on/off transitions. If you don't,
>>you will have a less-than-efficient design. This extra power loss
>>winds up mostly in the MOSFET.
>
>I'm not trying to knock your apparent knowledge in this area,
Neither am I,as by your email address, you have a better chance than many of
having some, but
The basic problem I saw with your approach was the assumption about
drive capability. A PIC is NOT going to produce the rise and fall times
you gave.
The reason you need high drive capability to drive a FET is to quickly
charge/discharge the miller capacitance when the drain is falling.
Without the ability to quickly transition out of that region your
power dissipation can get out of hand. That is one of the things that
dedicated hardware will get you.
Much can be done with the PIC output, but if you are looking for a high
switching frequency to allow better response/smaller inductor, you will
have real problems with a PIC
In the example you gave, the power dissipation is 65% higher by my
calculation but still doesn't need a heat sink.
However someone trying to the mythical max of 2W dissipation in the
transistor will find themselves in for an unplesant surprise
based on your assumptions.
>
>IRF has a table of turn-on and turn-off times for standard CMOS
>and TTL gate drives for logic level MOSFETS in thier APP note AN971.
>I picked a worst case approximation for the above device
>compared to a device with similar gate and miller
>capacitance. I rounded up both times to the nearest 100nS.
>
> ton = 200nS
> toff = 100nS
Try using the gate charge graphs in the IR datasheet, adjusted for the
voltage and current conditions you are using.
Capacitance during switching varies widely as the miller effect multiplies
the gate-drain capacitance, and that capacitance changes during the
transition. It is more accurate to use gate charge and the equations
I= C*dV/dt
Q = C*V
Using Voh/Ioh values from the 16C74 datasheet to get output resistances,
I calculated
ton = 1000ns
toff = 350ns
This changes the total power dissipation from 133mW to 220 mW.
Trying to switch extra current will quickly cause problems with
these switching times.
I hope this discussion helps some folks,
Jonathan
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