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'Re[2]: PIC16C84 & PortB interrupt'
1995\11\28@121907 by BBoles

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    Actually, we understand this as a bug and it is being fixed in all new
    devices including upcoming 'A' versions of '74, '73, '65, '64 , etc.

    Rgds, Brian.


______________________________ Reply Separator _________________________________
Subject: Re: PIC16C84 & PortB interrupt
Author:  "Martin J. Maney" <spam_OUTmaneyTakeThisOuTspamMCS.COM> at Internet_Exchange
Date:    11/24/95 12:34 AM


On Thu, 23 Nov 1995, Andrew Warren wrote:

> It was bad enough when only instructions that performed an EXPLICIT
> read or read-modify-write kept the interrupt from happening... This
> new information makes the change-on-portB interrupt almost
> COMPLETELY worthless.  Does Microchip see this as a bug and plan to
> correct it in future revs of the chip?

I have no connection with Microchip other than that I'm designing a 16C73
into a product currently being prototyped, but I believe I can predict
the answer.  They will say "no".  The data sheet has always [always = in
the 1994 and 1995/1996 books] implied that this feature was intended for
use in applications where the input change is used to wake the chip from
a sleep state, and of course when the chip is sleeping it won't be
reading or writing the port B pins and disturbing the change sensing...

There's even an application note that demonstrates exactly this use,
isn't there?

So I believe that this is _exactly_ the operation that Microchip designed
into those pins on port B, and the bug is only that you wish they worked
otherwise than they do.  The 1995/1996 databook is pretty explicit about
this:  "the interrupt on change feature is reccomended for wake-up on key
depression operation and operations where port B is used only for the
interrupt on change feature."  I think they could allow as well
applications where bit 0 is used as an external interrupt input (for
non-sleeping applications).


'Re[2]: PIC16C84 & PortB interrupt'
1995\12\01@112214 by John Payson
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> On Thu, 23 Nov 1995, Andrew Warren wrote:
>
> > It was bad enough when only instructions that performed an EXPLICIT
> > read or read-modify-write kept the interrupt from happening... This
> > new information makes the change-on-portB interrupt almost
> > COMPLETELY worthless.  Does Microchip see this as a bug and plan to
> > correct it in future revs of the chip?

[bboles replied]
>
>      Actually, we understand this as a bug and it is being fixed in all new
>      devices including upcoming 'A' versions of '74, '73, '65, '64 , etc.
>
>      Rgds, Brian.

What precisely is Microchip fixing in the 'A' versions?  Most of the quirks
I can see with the PortB behavior (and read-modify-write in general) are
things that a "clever programmer" might exploit in some way.

Also, what is the specific behavior of the register read logic?  Does it
do the read for any opcode whose top six bits are not "00 0000", or does
it read regardless?  If the latter, does this cause any potential problems
with serial I/O on the '74 [since reading the input latch clears it, and
the output latch shares the input latch's address]?

PS--Personally, my preferred implementation for an "interrupt-on-change"
pin feature would be to have the interrupt triggered if/when the signal on
the port pin does not match the output latch.  This could then be easily
cleared either by "movf port,f" or by most read-modify-write operations on
the port.

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