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'Painful lessons to learn from'
1996\11\07@173917 by Chris Eddy

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Fellow Picsters;
I have two learning experiences that I want to share, in the hope that you
won't learn my hard lesson.

The first lesson relates to the 93LC46 SPI bus EEPROM.  I had used the chip
without incident two times, and implemented it in a third PIC project.  In
all three projects, I rolled my own SPI bus, and was using some pieces of
code over.  I got the darned thing up and running, and the EEPROM absolutely
refused to work!  I extended the serial train to get that status indication
that indicates when the write begins and ends, and lo and behold it never
wrote.  To skip the saga of the long hours invested late at night, I found
that at a clock rate of 200Hz, the chip fails to function.  If you peruse the
databook, it indicates only a max limit at 2MHz.  It says nothing about a
minimum.  Sure enough, my other two projects were running faster, and an
interrupt routine shuffle on the third project solved the problem.  The moral
of the story is do not run EEPROMS too slow.

The second lesson relates to the analog input on the '73.  I have a nice big
piece of code that reads analogs, then can run one of two pieces of code,
based on a button press.  The first is a run time value display routine and
the second is a config menu.  I found that when I pressed the button and ran
the second protion of code, my analog input value for channel two fell to
zero.  I anguished for days, and finally found that the second piece of code,
upon entering, disables interrupts briefly.  This disable occured in the
timeline precisely where the interrupt for the analog result would arrive.
The chip would presumably just hold the value and interrupt when GIE is set
again, but I observed that it corrupted the analog input value.  My solution
was to put a simple looping delay to kill time just after setting the analog
convert bit.  The interrupt occured during this fudge time.  Works fine!

Hope these stories help someone on the list.
Christopher Eddy, PE
Pioneer Microsystems, Inc.
Pittsburgh, PA

1996\11\07@212251 by fastfwd

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Chris Eddy <spam_OUTPICLISTTakeThisOuTspamMITVMA.MIT.EDU> wrote:

> The first lesson relates to the 93LC46 SPI bus EEPROM.  ....  I
> found that at a clock rate of 200Hz, the chip fails to function.
> If you peruse the databook, it indicates only a max limit at 2MHz.
> It says nothing about a minimum.  Sure enough, my other two
> projects were running faster, and an interrupt routine shuffle on
> the third project solved the problem.  The moral of the story is do
> not run EEPROMS too slow.

   Chris:

   The problem with running certain Microchip SPI EEPROMs too slowly
   is that the "Write Complete" signal goes away shortly after the
   EEPROM asserts it.  All other functions work fine no matter how
   slowly you clock the chip... You just have to check the "Write
   Complete" signal pretty often after sending a "write"
   instruction.

> The second lesson relates to the analog input on the '73. .... [I]
> found that the second piece of code, upon entering, disables
> interrupts briefly.  This disable occured in the timeline precisely
> where the interrupt for the analog result would arrive. The chip
> would presumably just hold the value and interrupt when GIE is set
> again, but I observed that it corrupted the analog input value.

   I've never seen this behavior... I suspect that the problem
   was caused by your software.

   -Andy

=== Andrew Warren - .....fastfwdKILLspamspam@spam@ix.netcom.com                 ===
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1996\11\08@003453 by tjaart

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Chris Eddy wrote:
{Quote hidden}

Thanks! I'm saving it.

--
Friendly Regards

Tjaart van der Walt
______________________________________________________________
|  Another sun-deprived R&D Engineer slaving away in a dungeon |
|WASP International GSM vehicle tracking and datacomm solutions|
|           +27-(0)11-622-8686 | http://wasp.co.za             |
|______________________________________________________________|

1996\11\08@102740 by s.bormann

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Hi Chris!

> I anguished for days, and finally found that the second piece of code,
> upon entering, disables interrupts briefly.  This disable occured in the
> timeline precisely where the interrupt for the analog result would arrive.

How do you disable interrupts? There is a hint in the data book, that
an interrupt that occurs exactly at the moment when you disable the
global interupts will happen. So your main program disables interrupts
and after that instruction, your ISR will be entered and the retfie
at the end of the ISR will reenable the interrupt.
At least this is my interpretation of the data book :-)
You need a loop to ensure the interrupts are successfully disabled.
Let's call it a bug in the 16C73!?

--
Stefan Bormann  s.bormannspamKILLspamtu-bs.de

FREMO: ourworld.compuserve.com/homepages/shipmill/inhalt.htm

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