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'Possibility of using the PWM output as a proportio'
1998\10\01@183741 by Craig Lee

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I am attempting to use the PWM output on a '73A through a
capacitor to ground to get a proportional DC voltage out.

The PWM frequency is 3090 Hz and the duty cycle is varied.

However, I get too much ripple on the DC output.

Any brilliant ideas?  Is my frequency too low? Too high? How
do I select the proper capacitor? Do I need a diode?

Craig

1998\10\01@184819 by Peter L. Peres

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On Thu, 1 Oct 1998, Craig Lee wrote:

> I am attempting to use the PWM output on a '73A through a
> capacitor to ground to get a proportional DC voltage out.
>
> The PWM frequency is 3090 Hz and the duty cycle is varied.
>
> However, I get too much ripple on the DC output.
>
> Any brilliant ideas?  Is my frequency too low? Too high? How
> do I select the proper capacitor? Do I need a diode?

You need a low pass filter. The easiest would be a resistor between the
PIC pin and the capacitor, for now. Choose one such that T = R * C >= 10 /
f0 for starters. This has some tradeoffs (such as settling speed and
output impedance) but it works. Later, you may want to use a coil instead
of the resistor and add a diode or two. This will improve matters
considerably but needs some calculations. If you want really smooth dc
output, use an op-amp low pass filter (active filter) chosen to attenuate
the lowest component in the PWM to your required ripple specs.

hope this helps,

Peter

1998\10\01@185043 by Dmitry Kiryashov

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Hello Craig Lee.

Would you be so kind to make a more precision definitions what you mean
in your qustions. Please add tech information into your inquiry and
peoples
around there will be easy to answer you.

1. What is req's for freq's of output signal ?
2. What is req's for maximal ampl. of noises in output ?
3. What type of low-pass filter you apply ? (simple RC network ?)
  (also write current params of RC components)
4. Something else you wish to ask additionaly

WBR Dmitry.

Craig Lee wrote:
>
> I am attempting to use the PWM output on a '73A through a
> capacitor to ground to get a proportional DC voltage out.
> The PWM frequency is 3090 Hz and the duty cycle is varied.
> However, I get too much ripple on the DC output.
> Any brilliant ideas?  Is my frequency too low? Too high? How
> do I select the proper capacitor? Do I need a diode?

1998\10\01@193623 by Peter Strong

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Presumably you have a series resistor in front of the cap :-)

A better cct can be made from a simple active filter based on a single
opamp. PWM from PIC to R1 to inverting input of op-amp, non inverting input
to 0v. Output of op-amp to inverting input via R2. Put C1 in parallel with
R2. If R1=R2 then gain is 1. If you need gain then Gain=R2/R1. For 3KHz core
PWM try R1=100K, R2=100K, C1=470nF. You should get very little ripple but
response time will be slowish. For faster response at the expense of a
little ripple, reduce C1.
When PIC VDD=5v. 50/50 PWM=0v. 1/99 PWM = plus 2.49v. 99/1 PWM = minus
2.49v.
If you want the output to swing 0v to 5v proportional rather than plus and
minus about 0v then bias the non-inverting input with 2.5v. Then 50/50 PWM =
2.5v etc. You'll need to power the opamp from a split rail to get positive
and negative swings about 0v. If you've only got 5v then you should use a
rail to rail input, rail to rail output opamp and bias the non-inverting
input with 2.5v. Two 100K's in series between 5v and 0v, connect centre tap
to non inverting input. I hate ASII art for circuits cos they nearly always
get scrambled by the email reader. If you're desperate and can't understand
the text, mail me off list at spam_OUTpeter_strongTakeThisOuTspammsn.com and I'll attach a
schematic to my reply.


{Original Message removed}

1998\10\01@195710 by James Cameron

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Craig Lee wrote:
> I am attempting to use the PWM output on a '73A through a
> capacitor to ground to get a proportional DC voltage out.

Well, um, presumably the output is oscillating from supply to ground,
right?  So I would expect to get the capacitor charged when the output
is at supply, and then discharged when the output is at ground.  If you
have no resistor in that, then the chip drivers will be pulling and
pushing Real Hard (tm), and so of course the voltage at the capacitor
will look like a saw tooth triangular wave approaching a square wave,
depending on the capacitor value versus the PCB trace resistance.

If you stick a diode between the output pin and the top of the
capacitor, all that will happen is that the capacitor will reach supply
voltage, unless you are draining it some other way.

As someone else said, I think there is some way with appropriate sizing
of resistor and capacitor to reduce the amount of movement of the
voltage at the capacitor.  But there would be the drawback of reduced
responsiveness to a change in the PWM duty cycle.

I don't know a thing about the '73A though.  ;-)

--
James Cameron                                    (.....cameronKILLspamspam@spam@stl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\01@200547 by Harold Hallikainen

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On Thu, 1 Oct 1998 16:29:55 -0600 Craig Lee <cleespamKILLspamATTCANADA.NET> writes:
>I am attempting to use the PWM output on a '73A through a
>capacitor to ground to get a proportional DC voltage out.
>
>The PWM frequency is 3090 Hz and the duty cycle is varied.
>
>However, I get too much ripple on the DC output.
>
>Any brilliant ideas?  Is my frequency too low? Too high? How
>do I select the proper capacitor? Do I need a diode?
>
>Craig
>


       You need to add a resistor between the output pin and the
capacitor.  This forms a low pass filter with a cutoff frequency of
1/(2piRC) .  You can juggle cutoff frequency and PWM frequency to get the
ripple lower, generally at the expense of response time.  You can also go
to a higher order filter to attenuate the PWM while keeping the DC.
       I successfully did one project where the PIC PWM output drove a
resistor which then drove a 4051 demux.  Each demux output had a
capacitor.  I sent about 20 cycles of PWM to a capacitor, disabled the
mux, moved on to the next channel, set up the PWM, set up the demux, then
enabled the mux.
       In another project (the one I'm working on right now), I also had
a ripple problem that could not be solved without intolerable delays in
response.  I went to an external serial D/A.

Harold

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1998\10\01@230842 by Craig Lee

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Thanks to everyone for the wake up!  I guess we all get lazy sometimes.

I settled with a 100k and 68nF filter with a 68k load resistor.  This gives
me a 0-2V window as required, and provides me with some hardware
safegaurds as well.

For my application the 8ms rise time from 15% to 85% duty cycle is
acceptable.  This configuration also gives me less than 50mVp-p of
ripple, which was my tightest spec. to meet.

Craig


{Original Message removed}

1998\10\02@032453 by Quentin

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If you got the pins, have you considered a R2R ladder to get porportional
voltage for digital value? if you use four pins you'll get 5V/16=0.313V per
step or 5V/256 =0.0195V for 8 pins.

I think this is much more stable than PWM, IMHO.

Quentin

1998\10\02@115051 by Craig Lee

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I use an 8bit I2C DAC in another design, only because I use the bus for
other
things and it seemed to be the easiest path.

As far as stability goes, the outputs are comparable, if you are willing to
accept
50mVp-p of ripple on the PWM method.  Precision is also comparable, as the
duty cycle manipulation is also 8 bit.

I'd probably use the ladder network if I had the available I/O and no PWM or
I2C
bus.  Then again it depends on the situation, right.

Craig

{Original Message removed}

1998\10\02@122747 by John Payson

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part 0 3210 bytes
|However, I get too much ripple on the DC output.

|Any brilliant ideas?  Is my frequency too low? Too high? How
|do I select the proper capacitor? Do I need a diode?

As others have already stated, you need a resistor between the
port pin and the cap; also, R/2R DACs are wonderful devices.

There are a couple of tricks that may help improve things a bit
further, though:

[1] Unless your load is already a very high impedance, a non-
   inverting op-amp voltage follower on the output is probably
   a good idea, especially if you use some of the tricks below.

[2] When building an R/2R DAC, it's sometimes useful to work the
   bottom such that there are two equal LSB inputs (i.e.

  OUT <--+--R--+--R--+--R--+--R--+-----+
         |     |     |     |     |     |
        2R    2R    2R    2R    2R    2R
         |     |     |     |     |     |
  Bit    4     3     2     1     0     0'

   Then the MSB's of the desired output value can be placed on
   the "normal" pins while the LSB's control a PWM which drives
   the "spare" input.  Adding a 4-bit R/2R ladder will cut rip-
   ple 16-fold with reasonable pin count.

[3] The performance of your filter may be improved by using a
   number of RC's in sequence thus:

   IN--R--+--R--+--R--+--R--+--OUT
          |     |     |     |
          C     C     C     C
          |     |     |     |
         Gnd   Gnd   Gnd   Gnd

   For a 4KHz drive signal, I'd probably suggest using an RC
   time constant of 1ms (e.g. 10K resistors/0.1uF caps); in
   the circuit above that should pass through about 20mv of
   ripple while allowing a relatively quick response to any
   change in the PWM value.

[4] One style of "PWM" that I've not seen implemented in hardware
   even though a hardware implementation would be easy works
   as follows [the MSB of the output value is bit -1; the LSB
   is bit -n]

   On every other cycle, output bit -1
   On every 4th   cycle, output bit -2
   On every 8th   cycle, output bit -3
   On every 16th  cycle, output bit -4
   ...
   On every 2^nth cycle, output bit -n
   On those cycles remaining, output 0.

   Code to implement this looks like this [assuming that "count"
   runs from 0 to 255, incremented somewhere else]

               decf    count,w
               xorlw   255
               andwf   count,w ; Note: only one bit in W will be set!

               andwf   value,w
               ; Z flag now indicates desired PWM state

   This modulation method (not really "pulse-width" modulation)
   has a couple of advantages compared with other methods: the
   biggest bonus is that the hardware/software needed to add
   more outputs is pretty minimal (e.g. if you have the hardware
   for one 8-bit modulated pin, additional pins would require
   only 8 latches and 8 and-gates apiece--really a tiny amount
   of silicon).

   In addition to its simplicity, it benefits from a minimal
   amount of ripple: for the extreme values of 1 and 255, the
   ripple will be the same as with normal methods; for values
   in-between, the ripple will be much less than what ordinary
   PWM would produce.




1998\10\02@131348 by Peter L. Peres

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On Fri, 2 Oct 1998, John Payson wrote:

> [4] One style of "PWM" that I've not seen implemented in hardware
>     even though a hardware implementation would be easy works
- snip -

Many CD player AD converters use a related technique. They are NOT cheap.

Peter

1998\10\02@144309 by Quentin

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I just thought of something else:
If you use a R2R ladder and you want to change from a low value to higher
value, don't just change from low to high, but gradually step from low to
high (count up, x=x+1 loop). That way you don't have a sudden jump from one
value to another, but a gradual increase. Now you can also use a smaller
filter cap and have a faster response time (I think :-) ).
Cap charge time now only have to be long enough to smooth out to step from
x to x+1.

I realized this when I was watching my sinewave on the osci. that I created
using only 4 pins, nice stepping from low to high curve.

Oh well, it's Friday!!!!
Quentin

1998\10\02@210148 by Regulus Berdin

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John Payson wrote:
{Quote hidden}

I was using this method.  I had even posted the code a week or two ago a
2 cycle 4 bit resolution pwm using this method for Tjaart's challenge
for a battery charger controller.  Here is the corrected version of the
code.

;*******************************************************
;Modified PWM routine by Regulus Berdin.
;A pwm value of 0x0A will send a 011000011111111 pulse.
;Assumes pwm pin in bit 0, can be placed anywhere but
; requires little modification in the setup routine.
;
start:
       bcf     GPIO,0    ;initial state
       bsf     GPIO,1    ;

pwm     movf    pwm,w     ;get pwm
       movwf   tmp       ;work with tmp to preserve pwm
       rrf     tmp,w     ;
       xorwf   tmp       ;convert to delta
       rlf     tmp2      ;get first bit, put in bit 0
       movf    PORT,w    ;get last pwm pin level
       xorwf   tmp2      ; convert to delta
       movlw   B'100'    ;

       btfsc   tmp2,0    ;8
        xorwf  PORT      ;bit 0

       btfsc   tmp,0     ;
        xorwf  PORT      ;bit 1

       goto    $+1       ;
       btfsc   tmp,1     ;
        xorwf  PORT      ;bit 2

       movlw   B'11'     ;charge pump mask
       xorwf   GPIO      ;toggle charge pump
       movlw   B'100'    ;put back pwm toggle mask
       goto    $+1       ;delay 2 cycles to complete 6 cycles
       btfsc   tmp,1     ;
        xorwf  PORT      ;bit 3

       nop               ;
       btfsc   PORT,ovr  ;overcurrent
        decf   pwm       ;
       btfsc   PORT,und  ;undercurrent
        incf   pwm       ;4

       goto    pwm       ;2

This is very easy to convert to a have 8 or more bit resolution and
still retaining the 2 cycle per step.  There are also large idle
processes between each bit transitions that can be used to process data
(sine lookups, computations, etc).  Example, on the bit7 to bit0
transition can have up to 254 idle cycles, bit6 to 7 = 124 cycles.

Reggie

1998\10\04@183919 by paulb

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John Payson wrote:

> [4] One style of "PWM" that I've not seen implemented in hardware
>     even though a hardware implementation would be easy works as
>     follows [the MSB of the output value is bit -1; the LSB is bit -n]

 I'll figure that out sooner or later. ... OK, I've got it!

>     In addition to its simplicity, it benefits from a minimal amount
>     of ripple: for the extreme values of 1 and 255, the ripple will be
>     the same as with normal methods; for values in-between, the ripple
>     will be much less than what ordinary PWM would produce.

 I tend to consider the "standard" way to do PWM, that used by the
BASIC Stamp.  For every iteration, you add the "width" to an accumulator
and you set the "PWM" output bit according to the carry.

       movf    width,w
       addwf   accum,f
   ; C flag now indicates desired PWM state; up to you to output it!

 This most certainly fulfils the "minimum ripple" criterion above.  In
fact, I suspect the bitstream is identical to John's proposition.  Code
is simpler but his does use fewer registers when multiple channels are
employed.
--
 Cheers,
       Paul B.

1998\10\06@000950 by James Cameron

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John Payson wrote:
> [4] One style of "PWM" that I've not seen implemented in hardware
>     even though a hardware implementation would be easy works
>     as follows [the MSB of the output value is bit -1; the LSB
>     is bit -n]

>     Code to implement this looks like this [assuming that "count"
>     runs from 0 to 255, incremented somewhere else]
>
>                 decf    count,w
>                 xorlw   255
>                 andwf   count,w ; Note: only one bit in W will be set!
>
>                 andwf   value,w
>                 ; Z flag now indicates desired PWM state

After much thought and a bit of fiddling, I'm not sure I understand
this.

I've whipped up a FORTH algorithm that expresses the current PWM value
by displaying a series of asterisks or spaces ... but the output I see
suggests either that I've misunderstood the algorithm or misunderstood
the concept.

I agree that the DECF followed by XORLW and ANDWF will yield only one
bit set in the result.

Here is the FORTH rendition of the PIC code above ...

variable value
: test
 255 0 do                              ( vary count 0 to 254 )
   i 1-                                ( decf count,w    )
   255 xor                             ( xorlw 255       )
   i and                               ( andwf count,w   )
   value @ and                         ( andwf value,w   )
   255 and                             ( force to 8 bits )
   0= if ." *" else space then         ( test Z flag     )
 loop ;

And here is the output I get with values ranging from 0 to 4.

0 value ! test
********************************************************************************
********************************************************************************
********************************************************************************
***************
1 value ! test
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* * * * * * * * * * * * * * * * * * * *
2 value ! test
** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** ***
*** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** ***
*** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** ***
*** *** *** *** *** *** *** *** *** ***
3 value ! test
*   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *
*   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *
*   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *   *
*   *   *   *   *   *   *   *   *   *
4 value ! test
**** ******* ******* ******* ******* ******* ******* ******* *******
******* ******* ******* ******* ******* ******* ******* ******* *******
******* ******* ******* ******* ******* ******* ******* ******* *******
******* ******* ******* ******* ******* **

--
James Cameron                                    (.....cameronKILLspamspam.....stl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\06@024929 by

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       <snip>
> Here is the FORTH rendition of the PIC code above ...
>
> variable value
> : test
>   255 0 do                              ( vary count 0 to 254 )
>     i 1-                                ( decf count,w    )
>     255 xor                             ( xorlw 255       )
>     i and                               ( andwf count,w   )
>     value @ and                         ( andwf value,w   )
>     255 and                             ( force to 8 bits )
>     0= if ." *" else space then         ( test Z flag     )
>   loop ;
>
>
Was it called FORTH becasue the guy who invented it was on his fo(u)rth
bottle of JD when he decided on the syntax?

Mike Rigby-Jones
EraseMEmrjonesspam_OUTspamTakeThisOuTnortel.co.uk

1998\10\06@125747 by John Payson

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part 0 1353 bytes
|After much thought and a bit of fiddling, I'm not sure I understand
|this.

That's because the version I posted was just plain wrong the way I
described it.  If you reverse the bits in "value" then it will work
as intended.  Sorry about that everyone; I need to be more careful
in future.

Otherwise, you may find the following version a bit clearer in how it
does the "every other..." logic (though it's much bigger--obviously
much to big for use on a single PWM channel).

               btfsc           count,7
               movlw           1
               btfsc           count,6
               movlw           2
               btfsc           count,5
               movlw           4
               btfsc           count,4
               movlw           8
               btfsc           count,3
               movlw           16
               btfsc           count,2
               movlw           32
               btfsc           count,1
               movlw           64
               btfsc           count,0
               movlw           128
               ; If you have multiple PWM's you should save W here.

               andlw           value
               ; Z holds the proper PWM output.

There are ways to optimize the algorithm somewhat; the above code is
written for maximal simplicity.

1998\10\06@184903 by James Cameron

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Rigby-Jones, Michael [PAI01:4837:EXCH] wrote:
> Was it called FORTH becasue the guy who invented it was on his fo(u)rth
> bottle of JD when he decided on the syntax?

No, Mike.

Read it backwards.  It is a stack based language.  Numbers are placed
onto the stack and then the non-number words operate on them.  Hence
"255 and" means the same as "andlw 255."

See http://www.forth.org/ for more details.

Don't know what JD is.  Some acronym for a solder flux product?

--
James Cameron                                    (cameronspamspam_OUTstl.dec.com)
Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800

1998\10\06@190803 by Sean Breheny

face picon face
At 10:44 PM 10/6/98 +0000, you wrote:
>Rigby-Jones, Michael [PAI01:4837:EXCH] wrote:
>> Was it called FORTH becasue the guy who invented it was on his fo(u)rth
>> bottle of JD when he decided on the syntax?
>
>No, Mike.
>
>Read it backwards.  It is a stack based language.  Numbers are placed
>onto the stack and then the non-number words operate on them.  Hence
>"255 and" means the same as "andlw 255."
>
>See http://www.forth.org/ for more details.
>
>Don't know what JD is.  Some acronym for a solder flux product?

JD = Jack Daniels, an American Whiskey.

But I don't understand what you mean by "Read it backwards". Do you mean
FORTH is the opposite of BACKwards? Because I definately don't get any
meaning out of HTROF!



>
>--
>James Cameron                                    (@spam@cameronKILLspamspamstl.dec.com)
>Digital Equipment Corporation (Australia) Pty. Ltd. A.C.N. 000 446 800
>



Sean

+--------------------------------+
| Sean Breheny                   |
| Amateur Radio Callsign: KA3YXM |
| Electrical Engineering Student |
+--------------------------------+
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
KILLspamshb7KILLspamspamcornell.edu  Phone(USA): (607) 253-0315 ICQ #: 3329174

1998\10\06@192235 by William Chops Westfield

face picon face
Think of forth as the programming extension of a reverse polish notation
calculator.  I don't know where the name comes from.

BillW

1998\10\07@035216 by paulb
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Sean Breheny wrote:

>>Don't know what JD is.  Some acronym for a solder flux product?
> JD = Jack Daniels, an American Whiskey.

 And he *was* pulling your leg.

> But I don't understand what you mean by "Read it backwards". Do you
> mean FORTH is the opposite of BACKwards? Because I definately don't
> get any meaning out of HTROF!

 Esratrams! ;-)
--
 Cheers,
       Paul B.

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