'PORT B Interupt on Change - How fast ?'
I am using PORT B "interrupt on change" on a 16F84.
With the signals I am using it works well, but I can find no data sheet
information on several parameters which could be critical.
My query - is there a minimum hold time for the "difference" signal which
triggers the interupt.
The data sheet shows the comparison circuitry but does not indicate whether
RBIF is set asynchronously and essentially instantaneously or whether it
has some synchronous timing constraints (perhaps clock frequency or cycle
frequency). Is there a minimum time constraint and is it based on clock
While I could carry out measurements (which may or may not be conclusive)
there are no doubt PIClisters who have experience here, So -
- How long a "pulse" do you need to trigger this interupt?
- Is the timing asynchronous relative to the clock.
- Is there a known formal specification?
Pretty much everything in a PIC has a requirement for Fosc timing. That
is, it usually requires 1/4 of your instruction time. For a 4 MHz xtal,
you need a pulse width of 250nS.
At 09:36 PM 7/23/98 +1200, you wrote:
Andy Kunz - Statistical Research, Inc. - Westfield, New Jersey USA
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