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PICList Thread
'PIC16F87X - The kick a** flash version!!!'
1998\12\11@012025 by netquake

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face
Sorry, I'm posting this because I want to share my happyness!!! =]

Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
Up to 8K x 14 words of FLASH Program Memory,
Up to 368 x 8 bytes of Data Memory (RAM)
Up to 256 x 8 bytes of EEPROM data memory
Pinout compatible to the PIC16C73/74/76/77
Interrupt capability (up to 14 internal/external interrupt sources)
Eight level deep hardware stack
Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
Only single 5V source needed for programming   !!!!!!
Processor read/write access to program memory  !!!!!
Timer0: 8-bit timer/counter with 8-bit prescaler
Timer1: 16-bit timer/counter with prescaler, can be incremented during sleep via
external crystal/clock
Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
Two Capture, Compare, PWM modules
Capture is 16-bit, max. resolution is 12.5 ns,
Compare is 16-bit, max. resolution is 200 ns,
PWM max. resolution is 10-bit
10-bit multi-channel Analog-to-Digital converter Synchronous Serial Port (SSP) w
ith
SPI d (Master Mode)
and I 2 C d (Master/Slave)
Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with 9-bit
address detection
Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls
(40/44-pin only)

P.D: Anyone that wants one of this tested, contact me. I will be too happy to re
ceive
the chip! ;-)

-----------------------------------------------------
"Hiroshima '45  Tsjernobyl '86 ... Windows '95"
Windows 95: n. 32 bit extensions and a graphical
shell for a 16 bit patch to an 8 bit operating system
originally coded for a 4 bit microprocessor, written
by a 2 bit company...

netQ
<spam_OUTnetquakeTakeThisOuTspaminnocent.com>

1998\12\11@015443 by Dave Celsnak

picon face
Hum,
>Processor read/write access to program memory  !!!!!

This will be very interesting to play with.  What does this mean,
exactly?  What will we be able to do with this?

-Dave

{Quote hidden}

sleep via
>external crystal/clock
>Timer2: 8-bit timer/counter with 8-bit period register, prescaler and
postscaler
>Two Capture, Compare, PWM modules
>Capture is 16-bit, max. resolution is 12.5 ns,
>Compare is 16-bit, max. resolution is 200 ns,
>PWM max. resolution is 10-bit
>10-bit multi-channel Analog-to-Digital converter Synchronous Serial
Port (SSP) with
>SPI d (Master Mode)
>and I 2 C d (Master/Slave)
>Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI)
with 9-bit
>address detection
>Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS
controls
>(40/44-pin only)
>
>P.D: Anyone that wants one of this tested, contact me. I will be too
happy to receive
{Quote hidden}

______________________________________________________
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1998\12\11@020311 by Sean Breheny

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Hi Dave,

At 10:52 PM 12/10/98 PST, you wrote:
>Hum,
>>Processor read/write access to program memory  !!!!!
>
>This will be very interesting to play with.  What does this mean,
>exactly?  What will we be able to do with this?

Your PIC will now be able to act like Win95/98 <G>, writing all over its
own code as it runs! Actually, even though that would be possible and could
make for some very interesting debugging sessions, I am of course very glad
that Mchip has introduced this. It means, AFAIK, that your code will now be
able to write to the program memory in the middle of execution, so a PIC
could modify its own code at runtime. This has some great possiblities for
speeding up algorithms (instead of having bunch of conditional statements,
you might now be able to set up an extra area of memory, load it with code
depending upon the conditions, and then jump to that code and run it. You
will still probably be limited by the 10Million FLASH erase/write cycles or
whatever reliability level they have it up to now). I DO hope that there
are several security bits or some such that prevent writing to the code
memory during brownout. I haven't read the datasheet on it yet. IIRC, there
was only one EEPROM disable bit in previous PICs. I would think that more
than one would be waranted in this case.

Sean


>
>-Dave

+-------------------------------+
| Sean Breheny                  |
| Amateur Radio Callsign: KA3YXM|
| Electrical Engineering Student|
+-------------------------------+
Save lives, please look at http://www.all.org
Personal page: http://www.people.cornell.edu/pages/shb7
shb7spamspam_OUTcornell.edu  Phone(USA): (607) 253-0315 ICQ #: 3329174

1998\12\11@034846 by Jim Robertson

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At 22:52 10/12/98 PST, you wrote:
>Hum,
>>Processor read/write access to program memory  !!!!!
>
>This will be very interesting to play with.  What does this mean,
>exactly?  What will we be able to do with this?
>
>-Dave


Well for starters, it means the code area can be "self tested" via a
checksum.  I believe this
is a requirement for certain government "certifications" (for life support
etc) that microchip
have hither to been frozen out of.

I could be wrong, it is just something I thought I came across somewhere.


Jim




{Quote hidden}

--------------------------------------------------------
Jim Robertson
Email: TakeThisOuTnewfoundEraseMEspamspam_OUTpipeline.com.au

http://www.pipeline.com.au/users/newfound
--------------------------------------------------------

1998\12\11@075232 by Morgan Olsson

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At 19:52 1998-12-11 +1100, you wrote:
{Quote hidden}

I am specifically looking forward to verification, as my target system can
possibly hurt humans if it freaks out.

(Watchdog etc don«t protect errors like in literal values and much other
things)

I will also have it fiddling the PSU and run the checks both at elevated
and lowered voltage, and at the same time check as much of sensors etc at
the same time.

/Morgan

       Morgan Olsson                   ph  +46(0)414 70741
       MORGANS REGLERTEKNIK            fax +46(0)414 70331
       H€LLEKS           (in A-Z letters: "HALLEKAS")
       SE-277 35 KIVIK, SWEDEN               RemoveMEmrtspamTakeThisOuTiname.com
___________________________________________________________

1998\12\11@090021 by Andy Kunz

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>whatever reliability level they have it up to now). I DO hope that there
>are several security bits or some such that prevent writing to the code
>memory during brownout. I haven't read the datasheet on it yet. IIRC, there
>was only one EEPROM disable bit in previous PICs. I would think that more
>than one would be waranted in this case.

Microchip missed the boat on security and self-programming, imho.

You can only self-program if you are able to do external (normal
programming mode) accesses.

Kind of defeats the purpose, you know.

I would like to be able to update the code in a code-protected chip by
writing, say, a module which only becomes active in a certain situation
(enter a certain password, or pull an input pin low, or some such).  Then I
would be able to keep my code secret and make field updates.

If it had this feature, I would place an order for 20K parts tomorrow (got
the pricing from FAI already).  Now it REALLY is a tough one to call -
maybe I'll go with a Mot 68705P3 which DOES have this ability, sort-of.

Andy

==================================================================
Andy Kunz - Statistical Research, Inc. - Westfield, New Jersey USA
==================================================================

1998\12\11@090209 by wwl

picon face
On Fri, 11 Dec 1998 02:02:12 -0500, you wrote:

{Quote hidden}

The REAL usefulness about CPU writeable flash as opposed to ISP
(assuming this is the case with this part) is that it greatly
increases the options for firmware updates in the field, as they can
use whatever interface is built into a particular product - modem,
infra-red, radio, memory card etc. AFAIK only Hitachi offered this in
the past. The main problem is where the code doing the programming
runs - in the Hitachi parts you had to put it in RAM and hope the
power didn't disappear during programming!

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