Post by thread:PIC-based O-scope / logic analyzer

Has anyone built a PIC-based digital O-scope / logic analyzer ? I have a rough idea as to how to proceed. I would basically use an external ram buffer, counter for the ram address, 8-bit a/d tied to the data bus of the ram, and a programmable gain & offset op-amp to buffer the input to the a/d. The only area I am unsure of is a good trigger / sync circuit to release the clock for the address counter. I would use a PIC to interface with the PC via RS232 to transfer the buffer contents to the PC and to accept programming parameters from the PC. The PIC would be responsible for reseting the trigger / ram buffer circuts and programing the offset & gain of the input amp. The PIC would not be responsible for clocking in samples because it would be too slow. The address counter would be clocked from a separate crystal. I would like to keep this low-cost, otherwise I might as well go out and buy a used scope! I would like to keep total cost within the $100 range. My purpose for this is to make a useable device for analyzing signals and timing in future PIC projects. I really don't need a high precision instrument, just one that will let me adequately see what is going on in my circuits. I would like it to be useable in the 0-10Mhz range, so I presume I would want to be able to take samples at up to ten times the highest frequency to be observed. I appreciate your feedback and suggestions. I realize the I am asking for a lot from a handful of cheap parts.. <G> Thanks. Dan

At 04:00 PM 2/12/98 -0600, you wrote: >Has anyone built a PIC-based digital O-scope / logic analyzer ? > <big snip> Hi Dan, I am working on essentially the same project that you are. I have a prototype finished and I am in the process of getting it to work. Because I am currently a college student with very little free time, this is taking longer than one might expect. My design is quite simple and consists of a 40 MS/s ADC buffered by a high speed op-amp. The output of the ADC is captured by an SRAM (128kbit x 8). The clock is provided by a little can type oscillator, and the address is derived from a pair of 8-bit synchronous fast counters (74F579). A PIC controls when sampling is started/stopped and also allows a PC to read out the contents of the SRAM and clear the counter. Communication is via bi-directional EPP parallel port. I have had the prototype together for about a week and have had only abo ut 2 days to actually work on it. It is giving erratic output, which I think is due to some type of synchronization problem where either the SRAM is being programmed while the output of the ADC is undefined or the parallel port is reading the SRAM when it is not ready. I will continue to work on it and keep the piclist updated. I would encourage you, Dan, to also try your design. I am willing to help with component choice/ etc. As for trigger, I was going to just simply continuously sample (well, until 64k or whatever) was full, and then only display past a trigger point (similar to what commercial DSO do). This method also allows pre-trigger viewing. The only problem is that I can only sample in chunks of (maximum) 64k (16 bits of address) and the PC takes at least 32 milliseconds to read this out. This would give a maximum sampling duty cycle of 5% at 40MS/s or 40% at 5MS/s, the minimum rate for this ADC. This is a problem which you might try to overcome. Special triggering circuits might allow special functions, though, such as repetitive sampling to get very high effective sample rates on repetitive waveforms. Good luck, Sean +--------------------------------+ | Sean Breheny | | Amateur Radio Callsign: KA3YXM | | Electrical Engineering Student | +--------------------------------+ Fight injustice, please look at http://homepages.enterprise.net/toolan/joanandrews/ Personal page: http://www.people.cornell.edu/pages/shb7 spam_OUTshb7TakeThisOuTcornell.edu Phone(USA): (607) 253-0315

On Thu, 12 Feb 1998 17:25:34 -0500, Sean Breheny wrote: >At 04:00 PM 2/12/98 -0600, you wrote: >>Has anyone built a PIC-based digital O-scope / logic analyzer ? >> ><big snip> > >Hi Dan, > > I am working on essentially the same project that you are. I have a >prototype finished and I am in the process of getting it to work. Because I >am currently a college student with very little free time, I have a Software Engineering career and two kids using up all of *my* free time ;-) >this is taking >longer than one might expect. My design is quite simple and consists of a >40 MS/s ADC buffered by a high speed op-amp. The output of the ADC is >captured by an SRAM (128kbit x 8). The clock is provided by a little can >type oscillator, and the address is derived from a pair of 8-bit >synchronous fast counters (74F579). A PIC controls when sampling is >started/stopped and also allows a PC to read out the contents of the SRAM >and clear the counter. Yes we *are* thinking along the very same lines. Which ADC & SRAM devices are you using and how much did you pay for them? >Communication is via bi-directional EPP parallel port. I was planning on RS232, but that of course, is way too slow for continuous readout on the PC! I was thinking more along the line of triggered sample, download to PC, scroll trace across screen with scroll bars to examine. Rather more like a logic analyzer than an O-scope. I would also like at least 2 channels. > I have had the prototype together for about a week and have had only about >2 days to actually work on it. My PIC programer still resides on my Radio Shack Experimentor Socket <G> I haven't made the time to build a permanent version of it yet or to it into an enclosure. >It is giving erratic output, which I think >is due to some type of synchronization problem where either the SRAM is >being programmed while the output of the ADC is undefined or the parallel >port is reading the SRAM when it is not ready. > Are you trying to read the SRAM into the PC at the same time the samples are being clocked in? If so, how are you managing contention to the SRAM address and data busses? >I will continue to work on it and keep the piclist updated. I would >encourage you, Dan, to also try your design. I am willing to help with >component choice/ etc. I appreciate it. I am a long way from actually prototyping or even designing mine yet because I still have to finish making a modified version of the serial YAPP programmer and conclude my IR decoding experiments. I will keep a copy of your message around and keep in contact with you. As always my mind is way ahead of what I am actually working on at the moment.... Never enough time to see *all* of my ideas through to their conclusion. >As for trigger, I was going to just simply >continuously sample (well, until 64k or whatever) was full, and then only >display past a trigger point (similar to what commercial DSO do). This >method also allows pre-trigger viewing. A "soft" trigger of sorts huh? >The only problem is that I can only >sample in chunks of (maximum) 64k (16 bits of address) and the PC takes at >least 32 milliseconds to read this out. This would give a maximum sampling >duty cycle of 5% at 40MS/s or 40% at 5MS/s, the minimum rate for this ADC. >This is a problem which you might try to overcome. Hmmm, I as hoping to choose from sampling rates covering a range from audio frequencies all of the way up to the maximum sampling rate. I am not looking for any continuous sampling. I just want to trigger on an edge / level and look at the next 64k samples, at whatever time base, from the trigger. >Special triggering circuits might allow special functions, though, such as >repetitive sampling to get very high effective sample rates on repetitive >waveforms. > >Good luck, > Good luck to you! I am afraid that I am far away from starting the project. I am more in the "what if.." phase right know. {Quote hidden}>Sean > >+--------------------------------+ >| Sean Breheny | >| Amateur Radio Callsign: KA3YXM | >| Electrical Engineering Student | >+--------------------------------+ >Fight injustice, please look at >http://homepages.enterprise.net/toolan/joanandrews/ > >Personal page: http://www.people.cornell.edu/pages/shb7 >.....shb7KILLspam@spam@cornell.edu >Phone(USA): (607) 253-0315 > Dan