Post by thread:PCB Construction

Geoff Wootton wrote: > > I'm building a simple printed circuit board that uses a 16C84, couple > of transisters + diodes and a crystal + 2 caps. I want this circuit to > be as quiet as possible. 2 questions: > > 1) Is it ok to join up both ends of the earth (0v) rail or should the > earth rail be open ended. > > 2) Should I make the earth rail as wide as possible, filling as much > open space on the pcb as possible. > > Many thanks in advance for any help on the above. > > Geoff. If you have enough room to actually create a ground plane, go ahead and do so. If you have a ground trace running around hither and thither, it's best not to make it into a complete loop, since this may increase magnetic coupling, thus affect EMI susceptibility and emissions. If you are depending on a particular capacitor for most of your bypassing capacity, consider using its ground terminal as the single point connection for a number of ground traces, and put that cap roughly at the geometric center of it all. Wider traces have less inductance and resistance, so they are, of course, preferred. Traces carrying equal and opposite polarity currents are best positioned parallel to one another on opposite sides of the board (or layer), since doing so minimizes magnetic loop area. The ground plane is a special case of this. However, a complete ground 'ring' around the perimeter of the board is often desirable for ESD immunity. It becomes the path of least resistance for static discharge. This ring may be connected to protective ground (the green/yellow wire in the line cord) and/or to your system ground at a single low impedance point. In other words, the ESD guard doesn't carry any circuit currents. -- Paul Mathews, consulting engineer AEngineering Co. spam_OUToptoengTakeThisOuTwhidbey.com non-contact sensing and optoelectronics specialists

John Payson wrote: > > > > Had you just said "opposite sides of the board", I would have taken it as > > > you meant; it was the "(or layer)" that confused me. The only way I could > > > parse that was to assume you meant "sides" to by synonymous with "edges"; > > > assuming a squarish board, opposite edges would be far away from each other. {Quote hidden}> > > > I was just trying to include the case of multi-layer boards..... > > Ah, okay... that makes a bit more sense, though in fact any board with > more than two layers is almost certainly going to have a ground plane > and probably (though not always) a power plane as well rendering the > notion of "parallel tracks" a little odd... > > BTW, I've sometimes seen 4-layer boards in which the bypass caps were fed > by the same vias as the chips they've served, and others in which the chip > terminals were very solidly grounded. Which style is better? My tenden- > cy would be to favor the former in most cases. Yes, power and ground planes are often used in multilayer boards, and designers often increase the number of layers in order to get their benefits. The power and ground planes are often on the inner layers, also, since then you have the following advantages: 1. less board warpage 2. other traces easier to trace and rework 3. shorts less likely during troubleshooting 4. average distance to other layers is minimized 5. ground planes create a capacitor, and having them closer together means more capacitance Perhaps others can think of other properties. However, more capacitance to ground can be a serious problem in some designs. For example, suppose that you incorporate 100K resistors in series with CMOS inputs to prevend ESD damage (a common practice with the type of products I design). This doesn't seriously affect rise and fall times unless stray capacitance becomes significant. It's not too hard to get to 10pF for a short trace over a ground plane, and RC = 1us! (This will, no doubt, rouse someone who will tell me that the 100K resistor idea is stupid.) It's also may be easier to control impedance and to achieve a given impedance using parallel traces on adjacent layers rather than a trace over a (sometimes chopped up) ground plane. This becomes important for very high frequencies and/or for preserving fidelity of analog signals. The bypass effect of a capacitor is undoubtedly improved by connection to a plane rather than a trace, provided that the capacitor is equally close to the power and ground pins in each case. Current flow will be via the shortest path through the plane, and the wide conductor minimizes inductance. However, there may be other reasons, such as the capacitance problem mentioned above, why the trace is preferred. -- Paul Mathews, consulting engineer AEngineering Co. optoengKILLspamwhidbey.com non-contact sensing and optoelectronics specialists

In my former life, we did some more interesting things with caps in routing them to their respective ICs. Instead of tying a power/ground pin to the plane on a 4+ layer board, the via would have the normal pin clearance. On the surface where the cap is placed (usually the solder side for us), we'd have a thick trace (~20mil) from the pin to the respective pin of the bulk cap, AND THEN to a large via to the plane. This follows the theory of bypass where the cap is between the supply and the sink acting like a filter. Some caveats to this is that it is usually difficult to tie BOTH power pins (of, say, a 74AC00) to one cap under the chip. If you have a one-cap-per-IC philosophy, you have to decide whether to bypass power or ground by this scheme. This is also done to the (big) bulk caps where power enters the board: Run traces from the connector to the pads of the caps and then to the plane. Big traces. Also, we used 10-22UF in parallel with 0.1UF. Norm LeMieux MCHIP FAE/NW