Post by thread:MultiStage Counter with Shift Out

Hi, there is a friend that needs a special circuit to attach to a PIC, but I can't find a single chip solution for him. He needs a 2^8 bits counter, 8 stages, easy solution, but it needs to have a serial output, not parallel, so he could read the actual counter 8 bits using a 2 wire serial transfer. He can not use a microcontroller to count it because the signal high frequency involved, around 15MHz. In real this chip could be so dump and silly, with just 8 jk flipflops, a 8 bits shift register, and a couple of gates, it could be built with only 6 pins: Ground, Vcc, Pulses In, Reset, SDA + SCLK (2 wire comm). A 7th pin could control counting in BCD or Binary, and just to be snob, the 8th pin would be a bold "NC", or then, used to signal zero count (carry bit). A solution like that could use 8, 12, 16, 24 flipflops, so a high speed counting could be easily read by a PIC simply issuing RESET up/down, wait time for counting, reset up to hold count and enable serial transfer, and them issuing SCLKs to receive SDA data bits, then reset down to clear counter and repeat again. Does anybody knows anything like that available? It is incredible that I can't find anything so silly like that. -------------------------------------------------------- Wagner Lipnharski - UST Research Inc. - Orlando, Florida Forum and microcontroller web site: http:/http://www.ustr.net Microcontrollers Survey: http://www.ustr.net/tellme.htm

At 23:29 02/26/99 -0500, Wagner Lipnharski wrote: >He needs a 2^8 bits counter, 8 stages, easy solution, >but it needs to have a serial output, not parallel, so >he could read the actual counter 8 bits using a 2 wire >serial transfer. > >He can not use a microcontroller to count it because the >signal high frequency involved, around 15MHz. hm.. the timer1 specs i've seen go up to 16MHz in async counter mode. but might be overkill :) ge

> > Hi, there is a friend that needs a special circuit to attach > to a PIC, but I can't find a single chip solution for him. > > He needs a 2^8 bits counter, 8 stages, easy solution, > but it needs to have a serial output, not parallel, so > he could read the actual counter 8 bits using a 2 wire > serial transfer. > > He can not use a microcontroller to count it because the > signal high frequency involved, around 15MHz. This is where I get confused. Just because PICs do not run in the 15 Mhz range doesn't mean that the hardware counters can't. IIRC I read a thread here a couple of weeks ago stating that the hardware counters could accept signals in the 50 Mhz range with no problems. {Quote hidden}> > In real this chip could be so dump and silly, with just > 8 jk flipflops, a 8 bits shift register, and a couple > of gates, it could be built with only 6 pins: > Ground, Vcc, Pulses In, Reset, SDA + SCLK (2 wire comm). > A 7th pin could control counting in BCD or Binary, and > just to be snob, the 8th pin would be a bold "NC", or > then, used to signal zero count (carry bit). > > A solution like that could use 8, 12, 16, 24 flipflops, > so a high speed counting could be easily read by a PIC > simply issuing RESET up/down, wait time for counting, > reset up to hold count and enable serial transfer, > and them issuing SCLKs to receive SDA data bits, then > reset down to clear counter and repeat again. Again I'm confused. Presuming the signal is in the 15 Mhz range (67 ns period) and a PIC is running with a 5Mhz instruction clock (200 ns period), then even if such a chip existed, the finest resolution that the PIC could control the counter is at 3 count intervals, which is the number of ticks the counter would clock inbetween instructions. Right? Is the exact count necessary? Then you need something quite more complex that could be programmed with the amount of time to gate the incoming pulses along because the PIC isn't fast enough. If an exact count isn't necessary, then you simply prescale the count and let the PIC count it. But in any case the PIC's prescaler and count hardware is fast enough to handle the signal.... BAJ

Byron A Jeff wrote: > Again I'm confused. Presuming the signal is in the 15 Mhz range (67 ns period) > and a PIC is running with a 5Mhz instruction clock (200 ns period), then even > if such a chip existed, the finest resolution that the PIC could control the > counter is at 3 count intervals, which is the number of ticks the counter > would clock inbetween instructions. Right? > > Is the exact count necessary? Then you need something quite more complex that > could be programmed with the amount of time to gate the incoming pulses along > because the PIC isn't fast enough. > > If an exact count isn't necessary, then you simply prescale the count and let > the PIC count it. > > But in any case the PIC's prescaler and count hardware is fast enough to > handle the signal.... > > BAJ Well, its application requires a minimum counting of 15MHz, and it is not a pulse counter, but a frequency counter, what means it can stay holding the counting as long it needs to read the shift register. The counting gate is easily calculated with the PIC instruction execution time versus quantity of instructions, the common time loop, so it is easy to make a high precise counting gate even with a pic. Using a round number crystal frequency it will go to the crystal precision and accuracy. There is another problem involved, I didn't say at the first post, the pic will serve just as an interface between the device that will make use of the data and the 8 (yes, eight) counters like that working at the same time. The interesting point in here is that a simply 8 jk's fflops counter and an incorporated shift register could not cost more than $0.60, while it would be just the PIC crystal's cost. A shift register with a "serial input pin" and "serial output pin" would be great, since it allows to connect 8 or more chips in series, and at the reading time it just needs a string of clock pulses to transport all the bits (bits per chip times number of chips), in a long string of bits. In real, one can say it is a 8 or more bits counter with serial interface, probably found at the I2C or SPI chip library, but it doesn't exist. -------------------------------------------------------- Wagner Lipnharski - UST Research Inc. - Orlando, Florida Forum and microcontroller web site: http:/http://www.ustr.net Microcontrollers Survey: http://www.ustr.net/tellme.htm

At 11:42 02/27/99 -0500, Wagner Lipnharski wrote: >In real, one can say it is a 8 or more bits counter with serial >interface, >probably found at the I2C or SPI chip library, but it doesn't exist. one would really think that such a counter exists... if the readout time is not an issue, he could read only the counter overflow and increment the counter from the controller until it overflows after he stops counting the input (multiplexed counter clock input). that's almost serial :) or a combination: use some reasonable count number to divide the input (10..12 bit), which must be enough to allow you to count the overflows reliably. after the gate time, you clock the counters up to the next overflow, much as you handle the pic's prescalers when timing with them. ge

Wagner Lipnharski wrote: > > Hi, there is a friend that needs a special circuit to attach > to a PIC, but I can't find a single chip solution for him. > > He needs a 2^8 bits counter, 8 stages, easy solution, > but it needs to have a serial output, not parallel, so > he could read the actual counter 8 bits using a 2 wire > serial transfer. > > He can not use a microcontroller to count it because the > signal high frequency involved, around 15MHz. Using the internal prescaler, a PIC can count up to 50MHz. The only drawback is that the prescaler can't be read directly. It can be read indirectly with a trick, used by many PIC based frequency meters (another PIC pin sends pulses to the counter input until the prescaler overflows and TMR0 changes). This implies that the PIC can't counts external pulses when you are reading the prescaler. In case this is not a problem for your friend, this solution requires no external chip! Adriano

[001235C8] Loading Device = C:\WINDOWS\HIMEM.SYS [001235C9] LoadSuccess = C:\WINDOWS\HIMEM.SYS [001235C9] Loading Device = C:\WINDOWS\DBLBUFF.SYS [001235C8] LoadSuccess = C:\WINDOWS\DBLBUFF.SYS [001235C8] Loading Device = C:\WINDOWS\IFSHLP.SYS [001235C8] LoadSuccess = C:\WINDOWS\IFSHLP.SYS [0012367F] Loading Vxd = VMM [0012367F] LoadSuccess = VMM [0012367F] Loading Vxd = C:\WINDOWS\SMARTDRV.EXE [0012367E] LoadSuccess = C:\WINDOWS\SMARTDRV.EXE [0012367E] Loading Vxd = ndis.vxd [0012367E] LoadSuccess = ndis.vxd [0012367E] Loading Vxd = ndis2sup.vxd [0012367E] LoadFailed = ndis2sup.vxd [0012367E] Loading Vxd = JAVASUP.VXD [0012367E] LoadSuccess = JAVASUP.VXD [0012367E] Loading Vxd = CONFIGMG [0012367E] LoadSuccess = CONFIGMG [0012367E] Loading Vxd = NTKERN [0012367E] LoadSuccess = NTKERN [0012367E] Loading Vxd = VWIN32 [0012367E] LoadSuccess = VWIN32 [0012367E] Loading Vxd = VFBACKUP [0012367E] LoadSuccess = VFBACKUP [0012367E] Loading Vxd = VCOMM [0012367E] LoadSuccess = VCOMM [0012367E] Loading Vxd = C:\WINDOWS\system\VMM32\IFSMGR.VXD [0012367E] LoadSuccess = C:\WINDOWS\system\VMM32\IFSMGR.VXD [0012367E] Loading Vxd = C:\WINDOWS\system\VMM32\IOS.VXD [00123690] LoadSuccess = C:\WINDOWS\system\VMM32\IOS.VXD [00123690] Loading Vxd = mtrr [00123690] LoadSuccess = mtrr [00123690] Loading Vxd = SPOOLER [00123690] LoadSuccess = SPOOLER [00123690] Loading Vxd = UDF [00123690] LoadSuccess = UDF [00123690] Loading Vxd = VFAT [00123690] LoadSuccess = VFAT [00123690] Loading Vxd = VCACHE [00123690] LoadSuccess = VCACHE [00123690] Loading Vxd = VCOND [00123690] LoadSuccess = VCOND [00123690] Loading Vxd = VCDFSD [00123690] LoadSuccess = VCDFSD [00123690] Loading Vxd = VXDLDR [00123690] LoadSuccess = VXDLDR [00123690] Loading Vxd = VDEF [00123690] LoadSuccess = VDEF [00123690] Loading Vxd = VPICD [00123690] LoadSuccess = VPICD [00123690] Loading Vxd = VTD [00123690] LoadSuccess = VTD [00123690] Loading Vxd = REBOOT [00123690] LoadSuccess = REBOOT [00123690] Loading Vxd = VDMAD [00123690] LoadSuccess = VDMAD [00123690] Loading Vxd = VSD [00123690] LoadSuccess = VSD [00123690] Loading Vxd = V86MMGR [00123690] LoadSuccess = V86MMGR [00123690] Loading Vxd = PAGESWAP [00123690] LoadSuccess = PAGESWAP [00123690] Loading Vxd = DOSMGR [00123691] LoadSuccess = DOSMGR [00123691] Loading Vxd = VMPOLL [00123691] LoadSuccess = VMPOLL [00123691] Loading Vxd = SHELL [00123691] LoadSuccess = SHELL [00123691] Loading Vxd = PARITY [00123691] LoadSuccess = PARITY [00123691] Loading Vxd = BIOSXLAT [00123691] LoadSuccess = BIOSXLAT [00123691] Loading Vxd = VMCPD [00123691] LoadSuccess = VMCPD [00123691] Loading Vxd = VTDAPI [00123691] LoadSuccess = VTDAPI [00123691] Loading Vxd = PERF [00123691] LoadSuccess = PERF [00123691] Loading Vxd = c:\windows\SYSTEM\vrtwd.386 [00123690] LoadSuccess = c:\windows\SYSTEM\vrtwd.386 [00123691] Loading Vxd = c:\windows\SYSTEM\vfixd.vxd [00123690] LoadSuccess = c:\windows\SYSTEM\vfixd.vxd [00123691] Loading Vxd = vnetbios.vxd [00123690] LoadSuccess = vnetbios.vxd [00123690] Loading Vxd = turbovbf.vxd [00123690] LoadSuccess = turbovbf.vxd [00123690] Loading Vxd = vmouse [00123690] LoadSuccess = vmouse [00123690] Loading Vxd = ebios [00123690] LoadSuccess = ebios [00123690] Loading Vxd = vmouse [00123690] £Fœ^_ƒåvmouse [00123690] Loading Vxd = msmouse.vxd [00123690] LoadSuccess = msmouse.vxd [00123690] Loading Vxd = dynapage [00123690] LoadSuccess = dynapage [00123690] Loading Vxd = vpd [00123690] LoadSuccess = vpd [00123690] Loading Vxd = int13 [00123690] LoadSuccess = int13 [00123690] Loading Vxd = enable [00123691] LoadSuccess = enable [00123691] Loading Vxd = vkd [00123691] LoadSuccess = vkd [00123691] Loading Vxd = vdd [00123691] LoadSuccess = vdd [00123691] Loading Vxd = vflatd [00123691] LoadSuccess = vflatd [00123691] Loading Vxd = combuff [00123691] LoadSuccess = combuff [00123691] Loading Vxd = turbovcd.vxd [00123690] LoadSuccess = turbovcd.vxd [00123690] SYSCRITINIT = VMM [00123690] SYSCRITINITSUCCESS = VMM [00123690] SYSCRITINIT = MTRR [00123690] SYSCRITINITSUCCESS = MTRR [00123690] SYSCRITINIT = VCACHE [00123690] SYSCRITINITSUCCESS = VCACHE [00123690] SYSCRITINIT = PERF [00123690] SYSCRITINITSUCCESS = PERF [00123690] SYSCRITINIT = VPICD [00123690] SYSCRITINITSUCCESS = VPICD [00123690] SYSCRITINIT = VrtwD [00123690] SYSCRITINITSUCCESS = VrtwD [00123690] SYSCRITINIT = VTD [00123690] SYSCRITINITSUCCESS = VTD [00123690] SYSCRITINIT = VWIN32 [00123690] SYSCRITINITSUCCESS = VWIN32 [00123690] SYSCRITINIT = VXDLDR [00123690] SYSCRITINITSUCCESS = VXDLDR [00123690] SYSCRITINIT = NTKERN [00123690] SYSCRITINITSUCCESS = NTKERN [00123690] SYSCRITINIT = CONFIGMG [00123690] SYSCRITINITSUCCESS = CONFIGMG [00123690] SYSCRITINIT = VCDFSD [00123690] SYSCRITINITSUCCESS = VCDFSD [00123690] SYSCRITINIT = IOS [00123690] SYSCRITINITSUCCESS = IOS [00123690] SYSCRITINIT = PAGEFILE [00123690] SYSCRITINITSUCCESS = PAGEFILE [00123690] SYSCRITINIT = PAGESWAP [00123690] SYSCRITINITSUCCESS = PAGESWAP [00123690] SYSCRITINIT = PARITY [00123690] SYSCRITINITSUCCESS = PARITY [00123690] SYSCRITINIT = REBOOT [00123690] SYSCRITINITSUCCESS = REBOOT [00123690] SYSCRITINIT = EBIOS [00123690] SYSCRITINITSUCCESS = EBIOS [00123690] SYSCRITINIT = VDD [00123690] SYSCRITINITSUCCESS = VDD [00123690] SYSCRITINIT = VSD [00123690] SYSCRITINITSUCCESS = VSD [00123690] SYSCRITINIT = TURBOVBF [00123690] SYSCRITINITSUCCESS = TURBOVBF [00123690] SYSCRITINIT = COMBUFF [00123690] SYSCRITINITSUCCESS = COMBUFF [00123690] SYSCRITINIT = VCD [00123690] SYSCRITINITSUCCESS = VCD [00123690] SYSCRITINIT = VMOUSE [00123690] SYSCRITINITSUCCESS = VMOUSE [00123690] SYSCRITINIT = MSMINI [00123690] SYSCRITINITSUCCESS = MSMINI [00123690] SYSCRITINIT = ENABLE [00123690] SYSCRITINITSUCCESS = ENABLE [00123690] SYSCRITINIT = VKD [00123690] SYSCRITINITSUCCESS = VKD [00123690] SYSCRITINIT = VPD [00123690] SYSCRITINITSUCCESS = VPD [00123690] SYSCRITINIT = INT13 [00123690] SYSCRITINITSUCCESS = INT13 [00123690] SYSCRITINIT = VMCPD [00123690] SYSCRITINITSUCCESS = VMCPD [00123690] SYSCRITINIT = BIOSXLAT [00123690] SYSCRITINITSUCCESS = BIOSXLAT [00123690] SYSCRITINIT = SDVXD [00123690] SYSCRITINITSUCCESS = SDVXD [00123690] SYSCRITINIT = VNETBIOS [00123690] SYSCRITINITSUCCESS = VNETBIOS [00123690] SYSCRITINIT = NDIS [00123690] SYSCRITINITSUCCESS = NDIS [00123690] SYSCRITINIT = DOSMGR [00123690] SYSCRITINITSUCCESS = DOSMGR [00123690] SYSCRITINIT = VMPOLL [00123690] SYSCRITINITSUCCESS = VMPOLL [00123690] SYSCRITINIT = VFIXD [00123690] SYSCRITINITSUCCESS = VFIXD [00123690] SYSCRITINIT = JAVASUP [00123690] SYSCRITINITSUCCESS = JAVASUP [00123690] SYSCRITINIT = VCOMM [00123690] SYSCRITINITSUCCESS = VCOMM [00123690] SYSCRITINIT = VCOND [00123690] SYSCRITINITSUCCESS = VCOND [00123690] SYSCRITINIT = VTDAPI [00123690] SYSCRITINITSUCCESS = VTDAPI [00123690] SYSCRITINIT = VFLATD [00123690] SYSCRITINITSUCCESS = VFLATD [00123690] SYSCRITINIT = VDMAD [00123690] SYSCRITINITSUCCESS = VDMAD [00123690] SYSCRITINIT = V86MMGR [00123690] SYSCRITINITSUCCESS = V86MMGR [00123690] SYSCRITINIT = SPOOLER [00123690] SYSCRITINITSUCCESS = SPOOLER [00123690] SYSCRITINIT = UDF [00123690] SYSCRITINITSUCCESS = UDF [00123690] SYSCRITINIT = VFAT [00123690] SYSCRITINITSUCCESS = VFAT [00123690] SYSCRITINIT = VDEF [00123690] SYSCRITINITSUCCESS = VDEF [00123690] SYSCRITINIT = IFSMGR [00123690] SYSCRITINITSUCCESS = IFSMGR [00123690] SYSCRITINIT = VFBACKUP [00123690] SYSCRITINITSUCCESS = VFBACKUP [00123690] SYSCRITINIT = SHELL [00123690] SYSCRITINITSUCCESS = SHELL [00123691] DEVICEINIT = VMM [00123691] DEVICEINITSUCCESS = VMM [00123691] DEVICEINIT = MTRR [00123691] DEVICEINITSUCCESS = MTRR [00123691] DEVICEINIT = VCACHE [00123691] DEVICEINITSUCCESS = VCACHE [00123692] DEVICEINIT = PERF [00123692] DEVICEINITSUCCESS = PERF [00123692] DEVICEINIT = VPICD [00123692] DEVICEINITSUCCESS = VPICD [00123692] DEVICEINIT = VrtwD [00123692] DEVICEINITSUCCESS = VrtwD [00123692] DEVICEINIT = VTD [00123692] DEVICEINITSUCCESS = VTD [00123692] DEVICEINIT = VWIN32 [00123692] DEVICEINITSUCCESS = VWIN32 [00123692] DEVICEINIT = VXDLDR [00123692] DEVICEINITSUCCESS = VXDLDR [00123692] DEVICEINIT = NTKERN [00123696] DEVICEINITSUCCESS = NTKERN [00123696] DEVICEINIT = CONFIGMG [00123691] Dynamic load device PCI.VXD [00123691] Dynamic init device PCI [00123691] Dynamic init success PCI [00123691] Dynamic load success PCI.VXD [00123691] Dynamic load device VPOWERD.VXD [00123691] Dynamic init device VPOWERD [00123691] Dynamic init success VPOWERD [00123691] Dynamic load success VPOWERD.VXD [00123691] Dynamic load device pci.vxd [00123691] Dynamic init device PCI [00123691] Dynamic init success PCI [00123691] Dynamic load success pci.vxd [00123691] Dynamic load device isapnp.vxd [00123691] Dynamic init device ISAPNP [00123691] Dynamic init success ISAPNP [00123691] Dynamic load success isapnp.vxd [00123692] DEVICEINITSUCCESS = CONFIGMG [00123692] Dynamic load device PCI.VxD [00123692] Dynamic init device PCI [00123692] Dynamic init success PCI [00123692] Dynamic load success PCI.VxD [00123692] Dynamic load device PCI.VxD [00123692] Dynamic init device PCI [00123692] Dynamic init success PCI [00123692] Dynamic load success PCI.VxD [00123692] Dynamic load device PCI.VxD [00123692] Dynamic init device PCI [00123692] Dynamic init success PCI [00123692] Dynamic load success PCI.VxD [00123692] Dynamic load device PCI.VxD [00123692] Dynamic init device PCI [00123692] Dynamic init success PCI [00123692] Dynamic load success PCI.VxD [001236A4] Dynamic load device PCI.VxD [001236A4] Dynamic init device PCI [001236A4] Dynamic init success PCI [001236A4] Dynamic load success PCI.VxD [001236A4] Dynamic load device mmdevldr.vxd [001236A4] Dynamic init device MMDEVLDR [001236A4] Dynamic init success MMDEVLDR [001236A4] Dynamic load success mmdevldr.vxd [001236A4] Dynamic load device PCI.VxD [001236A4] Dynamic init device PCI [001236A4] Dynamic init success PCI [001236A4] Dynamic load success PCI.VxD [001236A4] Dynamic load device m1rmvsp.vxd [001236A4] Dynamic init device M1RMVSP [001236A4] Dynamic init success M1RMVSP [001236A4] Dynamic load success m1rmvsp.vxd [001236A4] Dynamic load device m1rmvsp.vxd [001236A4] Dynamic init device M1RMVSP [001236A4] Dynamic init success M1RMVSP [001236A4] Dynamic load success m1rmvsp.vxd [001236A4] Dynamic load device macxw4.vxd [001236A4] Dynamic init device MACXW4 [001236A4] Dynamic init success MACXW4 [001236A4] Dynamic load success macxw4.vxd [001236A6] Dynamic load device tpldr.vxd [001236A7] Dynamic init device TPLDR [001236A7] Dynamic init success TPLDR [001236A7] Dynamic load success tpldr.vxd [001236A7] Dynamic load device [001236A7] Dynamic load failed : [001236A7] File not found [001236A4] DEVICEINIT = ACPI [001236A4] DEVICEINITSUCCESS = ACPI [001236A4] DEVICEINIT = VCDFSD [001236A4] DEVICEINITSUCCESS = VCDFSD [001236A4] DEVICEINIT = IOS [001236A5] Dynamic load device C:\WINDOWS\system\IOSUBSYS\apix.vxd [001236A6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\apix.vxd [001236A6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\atapchng.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\atapchng.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\cdfs.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\cdfs.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\cdtsd.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\cdtsd.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\cdvsd.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\cdvsd.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\disktsd.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\disktsd.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\diskvsd.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\diskvsd.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\necatapi.vxd [001236A4] Dynamic load success C:\WINDOWS\system\IOSUBSYS\necatapi.vxd [001236A4] Dynamic load device C:\WINDOWS\system\IOSUBSYS\scsi1hlp.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\scsi1hlp.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\torisan3.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\torisan3.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\voltrack.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\voltrack.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\drvspacx.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\drvspacx.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\drvwcdb.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\drvwcdb.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\drvwppqt.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\drvwppqt.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\drvwq117.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\drvwq117.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\iomega.vxd [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\iomega.vxd [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\rmm.pdr [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\rmm.pdr [001236B6] Dynamic load device C:\WINDOWS\system\IOSUBSYS\bigmem.drv [001236B6] Dynamic load success C:\WINDOWS\system\IOSUBSYS\bigmem.drv [001236B6] DEVICEINITSUCCESS = IOS [001236B6] DEVICEINIT = PAGEFILE [001236B6] DEVICEINITSUCCESS = PAGEFILE [001236B6] DEVICEINIT = PAGESWAP [001236B6] DEVICEINITSUCCESS = PAGESWAP [001236B6] DEVICEINIT = PARITY [001236B6] DEVICEINITSUCCESS = PARITY [001236B6] DEVICEINIT = REBOOT [001236B6] DEVICEINITSUCCESS = REBOOT [001236B6] DEVICEINIT = EBIOS [001236B6] DEVICEINITSUCCESS = EBIOS [001236B6] DEVICEINIT = VDD [001236B6] DEVICEINITSUCCESS = VDD [001236B6] DEVICEINIT = VSD [001236B6] DEVICEINITSUCCESS = VSD [001236B6] DEVICEINIT = TURBOVBF [001236B6] DEVICEINITSUCCESS = TURBOVBF [001236B6] DEVICEINIT = COMBUFF [001236B6] DEVICEINITSUCCESS = COMBUFF [001236B6] DEVICEINIT = VCD [001236B6] DEVICEINITSUCCESS = VCD [001236B6] DEVICEINIT = VMOUSE [001236B6] DEVICEINITSUCCESS = VMOUSE [001236C4] DEVICEINIT = MSMINI [001236C4] DEVICEINITSUCCESS = MSMINI [001236C4] DEVICEINIT = ENABLE [001236C4] DEVICEINITSUCCESS = ENABLE [001236C4] DEVICEINIT = VKD [001236C4] DEVICEINITSUCCESS = VKD [001236C4] DEVICEINIT = VPD [001236C4] DEVICEINITSUCCESS = VPD [001236C4] DEVICEINIT = INT13 [001236C4] DEVICEINITSUCCESS = INT13 [001236C4] DEVICEINIT = VMCPD [001236C4] DEVICEINITSUCCESS = VMCPD [001236C4] DEVICEINIT = BIOSXLAT [001236C4] DEVICEINITSUCCESS = BIOSXLAT [001236C4] DEVICEINIT = SDVXD [001236C4] DEVICEINITSUCCESS = SDVXD [001236C4] DEVICEINIT = VNETBIOS [001236C4] DEVICEINITSUCCESS = VNETBIOS [001236C4] DEVICEINIT = NDIS [001236CB] DEVICEINITSUCCESS = NDIS [001236CB] Dynamic load device pppmac.vxd [001236C9] Dynamic init device PPPMAC [001236C9] Dynamic load device C:\WINDOWS\system\spap.vxd [001236C9] Dynamic init device SPAP [001236C9] Dynamic init success SPAP [001236C9] Dynamic load success C:\WINDOWS\system\spap.vxd [001236C9] Dynamic init success PPPMAC [001236C9] Dynamic load success pppmac.vxd [001236C9] Dynamic load device vtdi.386 [001236C8] Dynamic init device VTDI [001236C8] Dynamic init success VTDI [001236C8] Dynamic load success vtdi.386 [001236C8] Dynamic load device vip.386 [001236C8] Dynamic init device VIP [001236C8] Dynamic init success VIP [001236C8] Dynamic load success vip.386 [001236C8] Dynamic load device vtcp.386 [001236C8] Dynamic init device MSTCP [001236C8] Dynamic init success MSTCP [001236C8] Dynamic load success vtcp.386 [001236C8] Dynamic load device vdhcp.386 [001236C8] Dynamic init device VDHCP [001236C8] Dynamic init success VDHCP [001236C8] Dynamic load success vdhcp.386 [001236C8] Dynamic load device vnbt.386 [001236C8] Dynamic init device VNBT [001236C8] Dynamic init success VNBT [001236C8] Dynamic load success vnbt.386 [001236C8] DEVICEINIT = DOSMGR [001236C8] DEVICEINITSUCCESS = DOSMGR [001236C8] DEVICEINIT = VMPOLL [001236C8] DEVICEINITSUCCESS = VMPOLL [001236C8] DEVICEINIT = VFIXD [001236C8] DEVICEINITSUCCESS = VFIXD [001236C8] DEVICEINIT = JAVASUP [001236C8] DEVICEINITSUCCESS = JAVASUP [001236C8] DEVICEINIT = VCOMM [001236C8] DEVICEINITSUCCESS = VCOMM [001236C8] DEVICEINIT = VCOND [001236C8] DEVICEINITSUCCESS = VCOND [001236C8] DEVICEINIT = VTDAPI [001236C8] DEVICEINITSUCCESS = VTDAPI [001236C8] DEVICEINIT = VFLATD [001236C8] DEVICEINITSUCCESS = VFLATD [001236C8] DEVICEINIT = Display1 [001236C8] DEVICEINITSUCCESS = Display1 [001236C8] DEVICEINIT = VDMAD [001236C8] DEVICEINITSUCCESS = VDMAD [001236C8] DEVICEINIT = V86MMGR [001236C8] DEVICEINITSUCCESS = V86MMGR [001236C8] DEVICEINIT = SPOOLER [001236C8] DEVICEINITSUCCESS = SPOOLER [001236C8] DEVICEINIT = UDF [001236C8] DEVICEINITSUCCESS = UDF [001236C8] DEVICEINIT = VFAT [001236C8] DEVICEINITSUCCESS = VFAT [001236C8] DEVICEINIT = VDEF [001236C8] DEVICEINITSUCCESS = VDEF [001236C8] Initing hsflop.pdr [001236DA] Init Success hsflop.pdr [001236DA] Initing esdi_506.pdr [001236F4] Init Success esdi_506.pdr [001236F4] Initing esdi_506.pdr [001236FF] Init Success esdi_506.pdr [001236FF] Initing drvwq117.vxd [00123720] Init Success drvwq117.vxd [00123722] INITCOMPLETE = VMM [00123722] INITCOMPLETESUCCESS = VMM [00123722] INITCOMPLETE = MTRR [00123722] INITCOMPLETESUCCESS = MTRR [00123722] INITCOMPLETE = VCACHE [00123722] INITCOMPLETESUCCESS = VCACHE [00123722] INITCOMPLETE = PERF [00123722] INITCOMPLETESUCCESS = PERF [00123722] INITCOMPLETE = VPOWERD [00123722] INITCOMPLETESUCCESS = VPOWERD [00123722] INITCOMPLETE = VPICD [00123722] INITCOMPLETESUCCESS = VPICD [00123722] INITCOMPLETE = VrtwD [00123722] INITCOMPLETESUCCESS = VrtwD [00123722] INITCOMPLETE = VTD [00123722] INITCOMPLETESUCCESS = VTD [00123722] INITCOMPLETE = VWIN32 [00123722] INITCOMPLETESUCCESS = VWIN32 [00123722] INITCOMPLETE = VXDLDR [00123722] INITCOMPLETESUCCESS = VXDLDR [00123722] INITCOMPLETE = NTKERN [00123722] INITCOMPLETESUCCESS = NTKERN [00123722] INITCOMPLETE = CONFIGMG [00123722] INITCOMPLETESUCCESS = CONFIGMG [00123722] INITCOMPLETE = PCI [00123722] INITCOMPLETESUCCESS = PCI [00123722] INITCOMPLETE = ISAPNP [00123722] INITCOMPLETESUCCESS = ISAPNP [00123722] INITCOMPLETE = ACPI [00123722] INITCOMPLETESUCCESS = ACPI [00123722] INITCOMPLETE = VCDFSD [00123722] INITCOMPLETESUCCESS = VCDFSD [00123722] INITCOMPLETE = IOS [00123722] INITCOMPLETESUCCESS = IOS [00123722] INITCOMPLETE = PAGEFILE [00123722] INITCOMPLETESUCCESS = PAGEFILE [00123722] INITCOMPLETE = PAGESWAP [00123722] INITCOMPLETESUCCESS = PAGESWAP [00123722] INITCOMPLETE = PARITY [00123722] INITCOMPLETESUCCESS = PARITY [00123722] INITCOMPLETE = REBOOT [00123722] INITCOMPLETESUCCESS = REBOOT [00123722] INITCOMPLETE = EBIOS [00123722] INITCOMPLETESUCCESS = EBIOS [00123722] INITCOMPLETE = m1rmvsp [00123722] INITCOMPLETESUCCESS = m1rmvsp [00123722] INITCOMPLETE = VDD [00123722] INITCOMPLETESUCCESS = VDD [00123722] INITCOMPLETE = MACXW4 [00123722] INITCOMPLETESUCCESS = MACXW4 [00123722] INITCOMPLETE = VSD [00123722] INITCOMPLETESUCCESS = VSD [00123722] INITCOMPLETE = TURBOVBF [00123722] INITCOMPLETESUCCESS = TURBOVBF [00123722] INITCOMPLETE = COMBUFF [00123722] INITCOMPLETESUCCESS = COMBUFF [00123722] INITCOMPLETE = VCD [00123722] INITCOMPLETESUCCESS = VCD [00123722] INITCOMPLETE = VMOUSE [00123722] INITCOMPLETESUCCESS = VMOUSE [00123722] INITCOMPLETE = MSMINI [00123722] INITCOMPLETESUCCESS = MSMINI [00123722] INITCOMPLETE = ENABLE [00123722] INITCOMPLETESUCCESS = ENABLE [00123723] INITCOMPLETE = VKD [00123723] INITCOMPLETESUCCESS = VKD [00123723] INITCOMPLETE = VPD [00123723] INITCOMPLETESUCCESS = VPD [00123723] INITCOMPLETE = INT13 [00123723] INITCOMPLETESUCCESS = INT13 [00123723] INITCOMPLETE = VMCPD [00123723] INITCOMPLETESUCCESS = VMCPD [00123723] INITCOMPLETE = BIOSXLAT [00123723] INITCOMPLETESUCCESS = BIOSXLAT [00123723] INITCOMPLETE = SDVXD [00123723] INITCOMPLETEFAILED = SDVXD [00123723] INITCOMPLETE = VNETBIOS [00123723] INITCOMPLETESUCCESS = VNETBIOS [00123723] INITCOMPLETE = NDIS [00123723] INITCOMPLETESUCCESS = NDIS [00123723] INITCOMPLETE = PPPMAC [00123723] INITCOMPLETESUCCESS = PPPMAC [00123723] INITCOMPLETE = VTDI [00123723] INITCOMPLETESUCCESS = VTDI [00123723] INITCOMPLETE = VIP [00123723] INITCOMPLETESUCCESS = VIP [00123723] INITCOMPLETE = MSTCP [00123723] INITCOMPLETESUCCESS = MSTCP [00123723] INITCOMPLETE = VDHCP [00123723] INITCOMPLETESUCCESS = VDHCP [00123723] INITCOMPLETE = VNBT [00123723] INITCOMPLETESUCCESS = VNBT [00123723] INITCOMPLETE = DOSMGR [00123724] INITCOMPLETESUCCESS = DOSMGR [00123724] INITCOMPLETE = VMPOLL [00123724] INITCOMPLETESUCCESS = VMPOLL [00123724] INITCOMPLETE = VFIXD [00123724] INITCOMPLETESUCCESS = VFIXD [00123724] INITCOMPLETE = JAVASUP [00123724] INITCOMPLETESUCCESS = JAVASUP [00123724] INITCOMPLETE = VCOMM [00123724] Dynamic load device serenum.vxd [00123724] Dynamic init device SERENUM [00123724] Dynamic init success SERENUM [00123724] Dynamic load success serenum.vxd [00123724] Dynamic load device serenum.vxd [00123724] Dynamic init device SERENUM [00123724] Dynamic init success SERENUM [00123724] Dynamic load success serenum.vxd [00123724] Dynamic load device lptenum.vxd [00123724] Dynamic init device LPTENUM [00123724] Dynamic init success LPTENUM [00123724] Dynamic load success lptenum.vxd [00123724] Dynamic load device serwave.vxd [00123725] Dynamic init device SERWAVE [00123725] Dynamic init success SERWAVE [00123725] Dynamic load success serwave.vxd [00123725] INITCOMPLETESUCCESS = VCOMM [00123725] Dynamic load device C:\WINDOWS\system\serial.vxd [00123725] Dynamic init device SERIAL [00123725] Dynamic init success SERIAL [00123725] Dynamic load success C:\WINDOWS\system\serial.vxd [0012372A] Dynamic load device C:\WINDOWS\system\IOSUBSYS\atapchng.vxd [0012372A] Dynamic load success C:\WINDOWS\system\IOSUBSYS\atapchng.vxd [0012372A] Dynamic load device C:\WINDOWS\system\IOSUBSYS\necatapi.vxd [0012372A] Dynamic load success C:\WINDOWS\system\IOSUBSYS\necatapi.vxd [0012372A] Dynamic load device C:\WINDOWS\system\IOSUBSYS\torisan3.vxd [0012372A] Dynamic load success C:\WINDOWS\system\IOSUBSYS\torisan3.vxd [0012372A] Dynamic load device C:\WINDOWS\system\IOSUBSYS\drvspacx.vxd [0012372B] Dynamic load success C:\WINDOWS\system\IOSUBSYS\drvspacx.vxd [0012372B] Initing drvwppqt.vxd [0012372F] Init Success drvwppqt.vxd [0012372F] Dynamic load device es1371.vxd [00123730] Dynamic init device ES1371 [00123730] Dynamic init success ES1371 [00123730] Dynamic load success es1371.vxd [00123730] Dynamic load device dsound.vxd [00123734] Dynamic init device DSVXD [00123734] Dynamic init success DSVXD [00123734] Dynamic load success dsound.vxd [00123734] Dynamic load device nuwave.drv [00123734] Dynamic load failed nuwave.drv : [00123734] File not found [00123734] Dynamic load device es1371.vxd [00123734] Dynamic init device ES1371 [00123734] Dynamic init success ES1371 [00123734] Dynamic load success es1371.vxd [00123734] Dynamic load device mmdevldr.vxd [00123735] Dynamic init device MMDEVLDR [00123735] Dynamic init success MMDEVLDR [00123735] Dynamic load success mmdevldr.vxd [00123735] Dynamic load device vjoyd.vxd [00123735] Dynamic init device VJOYD [00123735] Dynamic init success VJOYD [00123735] Dynamic load success vjoyd.vxd [00123735] INITCOMPLETE = Display1 [00123735] INITCOMPLETESUCCESS = Display1 [00123735] INITCOMPLETE = TPLDR [00123735] INITCOMPLETESUCCESS = TPLDR [00123735] INITCOMPLETE = APIX [00123735] INITCOMPLETESUCCESS = APIX [00123735] INITCOMPLETE = CDTSD [00123735] INITCOMPLETESUCCESS = CDTSD [00123735] INITCOMPLETE = CDVSD [00123735] INITCOMPLETESUCCESS = CDVSD [00123735] INITCOMPLETE = DiskTSD [00123735] INITCOMPLETESUCCESS = DiskTSD [00123735] INITCOMPLETE = DiskVSD [00123735] INITCOMPLETESUCCESS = DiskVSD [00123735] INITCOMPLETE = scsi1hlp [00123735] INITCOMPLETESUCCESS = scsi1hlp [00123735] INITCOMPLETE = voltrack [00123735] INITCOMPLETESUCCESS = voltrack [00123735] INITCOMPLETE = IOMEGA [00123735] INITCOMPLETESUCCESS = IOMEGA [00123735] INITCOMPLETE = BIGMEM [00123735] INITCOMPLETESUCCESS = BIGMEM [00123735] INITCOMPLETE = SPAP [00123735] INITCOMPLETESUCCESS = SPAP [00123735] INITCOMPLETE = HSFLOP [00123735] INITCOMPLETESUCCESS = HSFLOP [00123735] INITCOMPLETE = ESDI_506 [00123735] INITCOMPLETESUCCESS = ESDI_506 [00123735] INITCOMPLETE = SERENUM [00123735] INITCOMPLETESUCCESS = SERENUM [00123735] INITCOMPLETE = LPTENUM [00123735] INITCOMPLETESUCCESS = LPTENUM [00123735] INITCOMPLETE = SERWAVE [00123735] INITCOMPLETESUCCESS = SERWAVE [00123735] INITCOMPLETE = es1371 [00123735] INITCOMPLETESUCCESS = es1371 [00123735] INITCOMPLETE = DSOUND [00123735] INITCOMPLETESUCCESS = DSOUND [00123735] INITCOMPLETE = vjoyd [00123735] INITCOMPLETESUCCESS = vjoyd [00123735] INITCOMPLETE = DRVWCDB [00123735] INITCOMPLETESUCCESS = DRVWCDB [00123735] INITCOMPLETE = DRVWPPQT [00123735] INITCOMPLETESUCCESS = DRVWPPQT [00123735] INITCOMPLETE = DRVWQ117 [00123735] INITCOMPLETESUCCESS = DRVWQ117 [00123735] INITCOMPLETE = VDMAD [00123735] INITCOMPLETESUCCESS = VDMAD [00123735] INITCOMPLETE = V86MMGR [00123735] INITCOMPLETESUCCESS = V86MMGR [00123735] INITCOMPLETE = SPOOLER [00123735] INITCOMPLETESUCCESS = SPOOLER [00123735] INITCOMPLETE = UDF [00123735] INITCOMPLETESUCCESS = UDF [00123735] INITCOMPLETE = VFAT [00123735] INITCOMPLETESUCCESS = VFAT [00123735] INITCOMPLETE = VDEF [00123735] INITCOMPLETESUCCESS = VDEF [00123735] INITCOMPLETE = CDFS [00123735] INITCOMPLETESUCCESS = CDFS [00123735] INITCOMPLETE = IFSMGR [00123735] INITCOMPLETESUCCESS = IFSMGR [00123735] INITCOMPLETE = VFBACKUP [00123735] INITCOMPLETESUCCESS = VFBACKUP [00123735] INITCOMPLETE = SHELL [00123735] INITCOMPLETESUCCESS = SHELL Initializing KERNEL LoadStart = system.drv LoadSuccess = system.drv LoadStart = keyboard.drv LoadSuccess = keyboard.drv LoadStart = mouse.drv LoadSuccess = mouse.drv LoadStart = macxw4.drv LoadStart = DIBENG.DLL LoadSuccess = DIBENG.DLL LoadSuccess = macxw4.drv LoadStart = mmsound.drv LoadSuccess = mmsound.drv LoadStart = comm.drv LoadSuccess = comm.drv LoadStart = gdi.exe LoadStart = C:\WINDOWS\SYSTEM\GDI32.DLL LoadStart = GDI.EXE LoadSuccess = GDI.EXE LoadStart = GDI.EXE LoadSuccess = GDI.EXE LoadStart = GDI.EXE LoadSuccess = GDI.EXE LoadStart = GDI.EXE LoadSuccess = GDI.EXE LoadSuccess = C:\WINDOWS\SYSTEM\GDI32.DLL LoadStart = c:\windows\fonts\vgasys.fon LoadSuccess = c:\windows\fonts\vgasys.fon LoadStart = c:\windows\fonts\vgafix.fon LoadSuccess = c:\windows\fonts\vgafix.fon LoadStart = c:\windows\fonts\vgaoem.fon LoadSuccess = c:\windows\fonts\vgaoem.fon LoadSuccess = gdi.exe LoadStart = user.exe LoadStart = DDEML.DLL LoadSuccess = DDEML.DLL LoadStart = C:\WINDOWS\SYSTEM\USER32.DLL LoadStart = USER.EXE LoadSuccess = USER.EXE LoadStart = USER.EXE LoadSuccess = USER.EXE LoadStart = USER.EXE LoadSuccess = USER.EXE LoadStart = USER.EXE LoadSuccess = USER.EXE LoadStart = USER.EXE LoadSuccess = USER.EXE LoadSuccess = C:\WINDOWS\SYSTEM\USER32.DLL LoadStart = COOL.DLL LoadSuccess = COOL.DLL Init = KEYBOARD InitDone = KEYBOARD Init = Mouse Status = Mouse driver installed InitDone = Mouse Init = LoadStart = DISPLAY.drv LoadSuccess = DISPLAY.drv LoadStart = ATIHAL64.DLL LoadSuccess = ATIHAL64.DLL InitDone = DISPLAY Init = Display Resources InitDone = Display Resources LoadStart = c:\windows\fonts\serife.fon LoadSuccess = c:\windows\fonts\serife.fon LoadStart = c:\windows\fonts\sserife.fon LoadSuccess = c:\windows\fonts\sserife.fon LoadStart = c:\windows\fonts\coure.fon LoadSuccess = c:\windows\fonts\coure.fon LoadStart = c:\windows\fonts\symbole.fon LoadSuccess = c:\windows\fonts\symbole.fon LoadStart = c:\windows\fonts\smalle.fon LoadSuccess = c:\windows\fonts\smalle.fon LoadStart = C:\WINDOWS\SYSTEM\MSREF1.TTF LoadFail = C:\WINDOWS\SYSTEM\MSREF1.TTF Failure code is 0016 LoadStart = C:\WINDOWS\SYSTEM\MSREF2.TTF LoadFail = C:\WINDOWS\SYSTEM\MSREF2.TTF Failure code is 0016 LoadStart = C:\WINDOWS\SYSTEM\PHONETIC.FON LoadSuccess = C:\WINDOWS\SYSTEM\PHONETIC.FON LoadStart = DIBENG.DLL LoadSuccess = DIBENG.DLL LoadStart = DIBENG.drv LoadSuccess = DIBENG.drv LoadSuccess = user.exe LoadStart = MSGSRV32.EXE LoadSuccess = MSGSRV32.EXE Init = Final USER InitDone = Final USER Init = Installable Drivers InitDone = Installable Drivers Init = TSRQuery InitDone = TSRQuery Init = Display Resources InitDone = Display Resources Init = Display Resources InitDone = Display Resources Terminate = User Terminate = Query Drivers EndTerminate = Query Drivers Terminate = Unload Network EndTerminate = Unload Network Terminate = Reset Display EndTerminate = Reset Display EndTerminate = User {Original Message removed}

> > Byron A Jeff wrote: > > Again I'm confused. Presuming the signal is in the 15 Mhz range (67 ns perio d) {Quote hidden}> > and a PIC is running with a 5Mhz instruction clock (200 ns period), then eve n > > if such a chip existed, the finest resolution that the PIC could control the > > counter is at 3 count intervals, which is the number of ticks the counter > > would clock inbetween instructions. Right? > > > > Is the exact count necessary? Then you need something quite more complex tha t > > could be programmed with the amount of time to gate the incoming pulses alon g > > because the PIC isn't fast enough. > > > > If an exact count isn't necessary, then you simply prescale the count and le t > > the PIC count it. > > > > But in any case the PIC's prescaler and count hardware is fast enough to > > handle the signal.... > > > > BAJ > > Well, its application requires a minimum counting of 15MHz, and it is > not > a pulse counter, but a frequency counter, what means it can stay holding > the counting as long it needs to read the shift register. So what's the maximum frequency? > > The counting gate is easily calculated with the PIC instruction > execution > time versus quantity of instructions, the common time loop, so it is > easy > to make a high precise counting gate even with a pic. Using a round > number > crystal frequency it will go to the crystal precision and accuracy. But if the frequency of what is counted is a lot higher than the frequency of the PIC then you cannot have precise control over the precision of the counts. No to within one pulse. Say you have a frequency that's 8 times faster than the PIC. The accuracy of the count you get will only be within 8 pulses of the actual number of pulses due to the slowness of the PIC's clock. So would it then not be better to simply prescale the pulses by 8 and let the PIC count the results? > > There is another problem involved, I didn't say at the first post, the > pic > will serve just as an interface between the device that will make use of > the data and the 8 (yes, eight) counters like that working at the same > time. I guess the real question is there a requirement for each of the counts to be taken at the same time. Since the interface PIC can hold and count as necessary, simultaneous counting doesn't seem to be a strong requirement. If that's the case then a simple multiplexer should be sufficient to gate the appropriate signal to the PIC. > > The interesting point in here is that a simply 8 jk's fflops counter and > an > incorporated shift register could not cost more than $0.60, while it > would > be just the PIC crystal's cost. But the part doesn't exist AFAIK. You'd have to have 2 parts, a counter like a 74HC393 and a loadable shift register. So to get simultaneous counting you'd need at least 16 parts. Whereas if you use the PIC, which is already there. You only need to add a single multiplexer. Can you be more specific about your design requirements? What are the min and max frequency of the sampled signals. Do they need to be sampled simultaneously? BAJ

>Hi, there is a friend that needs a special circuit to attach >to a PIC, but I can't find a single chip solution for him. > >He needs a 2^8 bits counter, 8 stages, easy solution, >but it needs to have a serial output, not parallel, so >he could read the actual counter 8 bits using a 2 wire >serial transfer. Right from the 12c508 data sheet: PIC12C5XX 40 Tt0H T0CKI High Pulse Width - No Prescaler 0.5 TCY + 20 ns - With Prescaler 10 ns 41 Tt0L T0CKI Low Pulse Width - No Prescaler 0.5 TCY + 20 ns - With Prescaler 10 ns Read it carefully! What they are saying is that if you use the prescaler with TMR0 and clock from an external input, the HI and LO periods must exceed 10 nS each. Thats a total period of 20 nS which is 50 MHz. This works! I have products that measure past 50 MHz with no problems. The logic is minorly convoluted. Feed the signal to TMR0 pin via a 2K2 resistor. Figure out what your measurement period is going to be. set TMR0 pin to OUTPUT assign the prescaler (/256) to TMR0 and clear TMR0. at the start of the measurement period, set TMR0 pin to INPUT. at end of measurement period, set TMR0 pin to output. read TMR0, store. clear counter :loop set TMR0 pin to hi compare TMR0 to stored value set TMR0 pin to lo if not same, goto normalize inc counter goto loop :normalize subtract counter value from 256 this is the LO byte of your 16 bit counter TMR0 is the hi byte of your 16 bit counter serialize it and send it out reset everything and go to top Note that if you already have a PIC and are not using TMR0 and have the time, you can integrate all that into the PIC you already have. I use a single 12c508 to implement a specialised frequency counter - I drive the displays using shift registers. dwayne Dwayne Reid <spam_OUTdwaynerTakeThisOuTplanet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (403) 489-3199 voice (403) 487-6397 fax Celebrating 15 years of Engineering Innovation (1984 - 1999) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Do NOT send unsolicited commercial email to this email address. My posting messages to Usenet neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email.

Byron A Jeff wrote: >But if the frequency of what is counted is a lot higher than the frequency of >the PIC then you cannot have precise control over the precision of the counts. >No to within one pulse. Say you have a frequency that's 8 times faster than >the PIC. The accuracy of the count you get will only be within 8 pulses of >the actual number of pulses due to the slowness of the PIC's clock. So would it >then not be better to simply prescale the pulses by 8 and let the PIC count >the results? Using the prescaler with TMR0 makes a 16 bit counter which is essentially independent of the PIC core. Using the PIC core to generate the gate signal can be very deterministic. If you make a loop that consumes 100,000 clock cycles, you will create a 100 mS gate (assuming 4.00 MHz crystal) with accuracy determined by the crystal used. In other words, this can function exactly like my old Fluke 1900A does. dwayne Dwayne Reid <.....dwaynerKILLspam@spam@planet.eon.net> Trinity Electronics Systems Ltd Edmonton, AB, CANADA (403) 489-3199 voice (403) 487-6397 fax Celebrating 15 years of Engineering Innovation (1984 - 1999) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Do NOT send unsolicited commercial email to this email address. My posting messages to Usenet neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email.

Well, it is fact that the PIC can count the low freq, lets say around 10MHz, and also uses a multiplexor to select 1 of 8 inputs, but I am a little bit confused. I am quite new to PIC, even that I know other controllers, but reading the PIC 30430c.pdf file, page 83, I can see the TIMER0 Clock Timings, as said that as RA4/T0CKI, and the Tt0H (high level pulse width) to be 20ns + 0.5Tcy (same for the low level). It means that running the unit with a cycle time of 50ns (20MHz), it will be able to sample external clocks (not using the prescaler) up to (25+20ns) per level, what takes 90ns for a complete cycle = 11MHz. So, one can say a PIC can count (no prescaler) frequencies up to 55% of its osc clock, when running at 20MHz. This percentage increases reducing the osc clock, for 10MHz osc, it goes to 71%. So, it means, according to what I can understand, that the unit can't just count pulses, it depends on the internal clock to sample the T0CKI, as many other controllers do, including the 8051 family. In that particular case, the 8051 is terrible since it requires 12 clock cycles for one instruction cycle, and so the maximum external frequency to be counted can not be higher than osc/12. So, or I understood it wrong, or some previous post is not correct, when somebody said the PIC could read external frequencies 8 times its own clock. Now, using prescaler, the min time for a complete external cycle at that pin is 60ns (for VDD between 3 and 6 Volts), it also means a maximum external frequency of 16MHz. Again, somebody also said about 50MHz to be easy to read. Well, I can be wrong, I don't know all the PIC available literature and models. If somebody know some model or some other information, please let me know about it. Thank you for your cooperation. -------------------------------------------------------- Wagner Lipnharski - UST Research Inc. - Orlando, Florida Forum and microcontroller web site: http:/http://www.ustr.net Microcontrollers Survey: http://www.ustr.net/tellme.htm

Use a PIC, it can count up to 50MHz by itself. -----Original Message----- From: Wagner Lipnharski <wagnerlKILLspamEARTHLINK.NET> To: .....PICLISTKILLspam.....MITVMA.MIT.EDU <EraseMEPICLISTspam_OUTTakeThisOuTMITVMA.MIT.EDU> Date: Saturday, February 27, 1999 1:50 AM Subject: MultiStage Counter with Shift Out {Quote hidden}>Hi, there is a friend that needs a special circuit to attach >to a PIC, but I can't find a single chip solution for him. > >He needs a 2^8 bits counter, 8 stages, easy solution, >but it needs to have a serial output, not parallel, so >he could read the actual counter 8 bits using a 2 wire >serial transfer. > >He can not use a microcontroller to count it because the >signal high frequency involved, around 15MHz. > >In real this chip could be so dump and silly, with just >8 jk flipflops, a 8 bits shift register, and a couple >of gates, it could be built with only 6 pins: >Ground, Vcc, Pulses In, Reset, SDA + SCLK (2 wire comm). >A 7th pin could control counting in BCD or Binary, and >just to be snob, the 8th pin would be a bold "NC", or >then, used to signal zero count (carry bit). > >A solution like that could use 8, 12, 16, 24 flipflops, >so a high speed counting could be easily read by a PIC >simply issuing RESET up/down, wait time for counting, >reset up to hold count and enable serial transfer, >and them issuing SCLKs to receive SDA data bits, then >reset down to clear counter and repeat again. > >Does anybody knows anything like that available? It is >incredible that I can't find anything so silly like that. > >-------------------------------------------------------- >Wagner Lipnharski - UST Research Inc. - Orlando, Florida >Forum and microcontroller web site: http:/http://www.ustr.net >Microcontrollers Survey: http://www.ustr.net/tellme.htm

At 19:07 02/27/99 -0500, Wagner Lipnharski wrote: >So, or I understood it wrong, or some previous post is not correct, >when somebody said the PIC could read external frequencies 8 times >its own clock. > >Now, using prescaler, the min time for a complete external cycle >at that pin is 60ns (for VDD between 3 and 6 Volts), it also means >a maximum external frequency of 16MHz. > >Again, somebody also said about 50MHz to be easy to read. timer0 with prescaler has a min period of "the greater of 20ns or ((Tcy+40ns)/N)" with Tcy the instruction cycle and N the prescale value (param. no. 42). selecting a prescale value of 256 gives the 50MHz previously mentioned, since the second term is then much smaller than 20ns with any reasonable clock frequency. (assuming approx. 50% duty cycle in the signal to satisfy param. 40 and 41.) these timer0 specs seem to be valid for most models. ge

Dwayne Reid wrote: > Using the prescaler with TMR0 makes a 16 bit counter which is essentially > independent of the PIC core. > > Using the PIC core to generate the gate signal can be very deterministic. > If you make a loop that consumes 100,000 clock cycles, you will create a 100 > mS gate (assuming 4.00 MHz crystal) with accuracy determined by the crystal > used. > > In other words, this can function exactly like my old Fluke 1900A does. The application assumes a calibration for each equipment, generating a conversion factor from the reading pulses to what it should be in real, so if the PIC clock oscillator frequency doesn't change so much with temperature (ppm), it will be ok. The main idea is to gate "x" time using the prescaler, read it as the high 8 bits, and then gate "x/256" without prescaler, so it would be the lower 8 bits. For an external frequency of 20MHz, "x/256" gate needs to be a max of 12.8us, while "x" would be 3.27ms. Assuming a 20MHz PIC clock osc, 12.8us represents 256 instruction cycles, plenty to control the timming, I guess, Is that right? -------------------------------------------------------- Wagner Lipnharski - UST Research Inc. - Orlando, Florida Forum and microcontroller web site: http:/http://www.ustr.net Microcontrollers Survey: http://www.ustr.net/tellme.htm

Ok, I got it wrong at the first sight. It means that a 20MHz clock osc PIC can count up to 11Mps without the use of prescaler, with single pulse counting, or 195kps pulse counting with the prescaler (50MHz/256), but losing 8 bits resolution. The tip to multiplex the input and then use another PIC pin to put pulses to the prescaler until it overflows gets back the lower 8 bits. Thanks for you all. -------------------------------------------------------- Wagner Lipnharski - UST Research Inc. - Orlando, Florida Forum and microcontroller web site: http:/http://www.ustr.net Microcontrollers Survey: http://www.ustr.net/tellme.htm

Hi, From: Wagner Lipnharski <wagnerlspam_OUTEARTHLINK.NET> >He needs a 2^8 bits counter, 8 stages, easy solution, >but it needs to have a serial output, not parallel, so >he could read the actual counter 8 bits using a 2 wire >serial transfer. > >He can not use a microcontroller to count it because the >signal high frequency involved, around 15MHz. A pic can read up to 50 MHz serially by using TMR0 and prescaler. There is an application note on Microchip website discussing it (frequency counter application). regards, Reggie

Hi, -----Original Message----- From: Wagner Lipnharski <@spam@wagnerlKILLspamEARTHLINK.NET> >or 195kps pulse counting with the prescaler (50MHz/256), >but losing 8 bits resolution. No! you will _NOT_ lose the 8 bit. There is a trick to actually get the value on the prescaler is by self clocking the TMR0 input with a pic pin. A resistor in series is added to prevent contention with the input. This is done by clocking the TMR0 pin until it overflows. The value of the prescaler is equal to 256 - N, where N is the number of clock pulses sent until overflows. regards Reggie

The data sheet you refer to is for the 16F8X. Highest frequency response for the prescaler is guaranteed to be 20 MHz, for a 60% duty cycle (30 ns high, 20 ns low). This is for 5 volt operation. My experience (based on the three 16F84 parts in my possession shows good results up to a little more than 25 MHz. The 50 MHz frequency counters that people refer to are for 16C54 and similar parts (10 ns high, 10 ns low). Hope this helps Dave Evans KILLspamdave.evansKILLspamdlcc.com > {Original Message removed}