Post by thread:Motorola 6805/11 user group?

I know this is a bad place to post this but does anybody know of a 6805/11 user's group like this one? I currently working on a project and would like to talk over some problems, like the WatchDog timer. They have a watchdog that gets enabled by setting a RAM bit. If this RAM bit get clobbed because the program goes astray, the WatchDog becomes disabled. This can happen in a power-on condition if the AC line is pulled and immediately plugged in again. Out of approx. 100 times performing this test, the processor can hang, at least this is what appears to be happening. I even have a power-monitior connected to the reset. This issues a reset when the 5 volt line drops below 4.5 volts. Thanks -Barry

Barry R Gordon <spam_OUTPICLISTTakeThisOuTMITVMA.MIT.EDU> wrote: > I know this is a bad place to post this but does anybody know of a > 6805/11 user's group like this one? > > I currently working on a project and would like to talk over some > problems, like the WatchDog timer. They have a watchdog that gets > enabled by setting a RAM bit. If this RAM bit get clobbed because > the program goes astray, the WatchDog becomes disabled. This can > happen in a power-on condition if the AC line is pulled and > immediately plugged in again. Out of approx. 100 times performing > this test, the processor can hang, at least this is what appears to > be happening. I even have a power-monitior connected to the reset. > This issues a reset when the 5 volt line drops below 4.5 volts. Barry: You may be misunderstanding the operation of the COP (Watchdog) Timer. You didn't say which 05/11 you were using, so I'll just list the various COP options for the most popular 6805s. Here's how it works on the various 6805s: 68HC705C4: No COP Timer. 68HC705C8, C9: You have to set the bit in RAM to enable the COP. Once the bit's set, the processor will ignore any attempts your code makes to clear it. This sounds good, BUT if your power-on-reset code doesn't execute properly, you might never be setting the bit in the first place. Maybe this is your problem. 68HC705C4A, C8A, C9A, P9 (and probably others): The COP is enabled/disabled through a Mask Option Register in ROM. 68HC705C0 (at least thru the current silicon rev [rev 5]): COP is enabled by default, and you need to write a "0" to a bit in RAM to disable it. The processor allows only one write to that bit, so if you want to ensure that the COP is NEVER accidentally disabled, your code should write a "1" to the bit. Hope this helps... -Andy Andrew Warren - .....fastfwdKILLspam@spam@ix.netcom.com Fast Forward Engineering, Vista, California http://www.geocities.com/SiliconValley/2499