Donald J. Bartley
I've been reading a few postings on your discussion group about serial
SRAM and serial memory. I ran into the same problem alittle while back
where I needed to access memory using very few in/out pins of the
controller. Serial EEPROM wouldn't do because I was writing hundreds of
pieces of data every few seconds and I knew the EEPROM would "die"
within a week or so. I did notice replies regarding the Ramtron FRAM
but I would run into the same situation. Granted it would last longer
than an EEPROM but it would "die" eventually and I didn't want that in
the back of my mind. Besides, the write cycles were to long, some up
into the millisecond range. I did try the Solutions Cubed "RAMPack"
which was mentioned in a few of the replies but again speed was the
issue. The module has the ability to do up to 19200 bps but they can't
guarantee that speed because of the inaccuracy of the ceramic resonator
they use for timing. The fastest they could guarantee was 9600 bps. I
needed faster speeds. So I developed my own module, it clocks up to 35
Mbps with a write time of 70nS. I realize most controllers don't clock
that fast but I wanted a module that waited for the controller, not the
other way around. The module was designed so the least amount of
program code would be needed to access it, nothing fancy just get in and
get out. Its all built around speed. Check out its specifications at:
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Donald J. Bartley wrote:
Website : http://business.vsnl.com/chiptech
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Donald J. Bartley wrote:
> The module has the ability to do up to 19200 bps but they can't
> guarantee that speed because of the inaccuracy of the ceramic
> resonator they use for timing. The fastest they could guarantee was
> 9600 bps.
I keep reading comments like this. Think about it. It's rubbish!
It doesn't matter *what* baudrate you use, a given percentage error in
timing will have the same effect on synchronization.
The only three problems you can have with higher baudrate are:
1} Impedance and termination mis-match in a given transmission line
becomes more significant the higher the frequency.
2} The processor must be fast enough to service the UART or "bit-bang"
routine at the right times.
3} For a given non-integral multiple of the baudrate used as the
ceramic resonator *or* crystal frequency, the error in the approximation
naturally increases for the higher baudrates. I presume this is what is
meant by the comment above.
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