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'MCLR'
1998\11\10@005409 by Dale Wescombe

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Thanks to all who offered help on the MCLR on POwer-up problem I posted a
few days ago. Microchip came to the party and gave me the following
answer........

Microchip say that several engineers have had this trouble.
The problem was that on power up MCLR rose at the same rate as VDD but the
chip wouldn't run until MCLR was taken low and then high again. All of this
happen well within Spec but the chip wouldn't run without a manual reset.
The brown out circuit ensures that on power down master clear resets
properly by going all the way to ground. If the cct is not there, the
electrolytic cap on the o/p side of the voltage regulator can hold a charge
long enough to prevent MCLR from resetting properly on power-up.
Sound good to you all?

Dale

1998\11\10@013406 by Dennis Plunkett

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At 16:57 10/11/98 +1000, you wrote:
>Thanks to all who offered help on the MCLR on POwer-up problem I posted a
>few days ago. Microchip came to the party and gave me the following
>answer........
>
>Microchip say that several engineers have had this trouble.
>The problem was that on power up MCLR rose at the same rate as VDD but the
>chip wouldn't run until MCLR was taken low and then high again. All of this
>happen well within Spec but the chip wouldn't run without a manual reset.
>The brown out circuit ensures that on power down master clear resets
>properly by going all the way to ground. If the cct is not there, the
>electrolytic cap on the o/p side of the voltage regulator can hold a charge
>long enough to prevent MCLR from resetting properly on power-up.
>Sound good to you all?
>
>Dale
>
>

Nope it doesn't. The cap on the o/p side of the regulator will only come
into play during a brown out phase. As for power rate rise, as long as it is
under the 18mS (?) limit then the chip is suposed to enter a reset state!
The brown out cirucit that you have been pointed to will also act as a reset
by holding the line low until VDD is above the thresshold. In your case I
would recommed that you use the simple RC method with a diode to dischage
the cap when the power is off (Or use a reset chip).

If what you say is correct, then the Microchip data sheet it telling "porky
pies" with reset and VDD rise times. I do hope that there has been a
communication error, else there will be alot of circuits out there that will
not work :-).

Dennis

               VDD
       ---------------
           |     |
           /    ---
      10k  \     ^
           /    /-\    1n4148 etc
           |     |
           |-----|---->to MCLR
           |
     10uF ===
           |
           |
       --------------- GND

ASCII art yuck!

1998\11\10@163817 by Dale Wescombe

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Maybe I didn't wirte this solution clearly. The problem on power-up is
caused by a "poor" power down. The brown out  cct creates a good power down
for the MCLR.
Dale




Dennis Plunkett <spam_OUTdennisTakeThisOuTspamRDD.NECA.NEC.COM.AU> on 11/10/98 04:37:19 PM

Please respond to pic microcontroller discussion list
     <.....PICLISTKILLspamspam@spam@MITVMA.MIT.EDU>

To:   PICLISTspamKILLspamMITVMA.MIT.EDU
cc:    (bcc: dale.wescombe)
Subject:  Re: MCLR




At 16:57 10/11/98 +1000, you wrote:
>Thanks to all who offered help on the MCLR on POwer-up problem I posted a
>few days ago. Microchip came to the party and gave me the following
>answer........
>
>Microchip say that several engineers have had this trouble.
>The problem was that on power up MCLR rose at the same rate as VDD but the
>chip wouldn't run until MCLR was taken low and then high again. All of
this
>happen well within Spec but the chip wouldn't run without a manual reset.
>The brown out circuit ensures that on power down master clear resets
>properly by going all the way to ground. If the cct is not there, the
>electrolytic cap on the o/p side of the voltage regulator can hold a
charge
>long enough to prevent MCLR from resetting properly on power-up.
>Sound good to you all?
>
>Dale
>
>

Nope it doesn't. The cap on the o/p side of the regulator will only come
into play during a brown out phase. As for power rate rise, as long as it
is
under the 18mS (?) limit then the chip is suposed to enter a reset state!
The brown out cirucit that you have been pointed to will also act as a
reset
by holding the line low until VDD is above the thresshold. In your case I
would recommed that you use the simple RC method with a diode to dischage
the cap when the power is off (Or use a reset chip).

If what you say is correct, then the Microchip data sheet it telling "porky
pies" with reset and VDD rise times. I do hope that there has been a
communication error, else there will be alot of circuits out there that
will
not work :-).

Dennis

               VDD
       ---------------
           |     |
           /    ---
      10k  \     ^
           /    /-\    1n4148 etc
           |     |
           |-----|---->to MCLR
           |
     10uF ===
           |
           |
       --------------- GND

ASCII art yuck!

1998\11\10@170723 by Tony Nixon

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picon face
Dale Wescombe wrote:
>
> Maybe I didn't wirte this solution clearly. The problem on power-up is

Perhaps you need a smaller cap on the PIC side of the reg, or a 'load'
resistor to bleed off the charge on power down. Not a very good solution
for power miser circuits though.

--
Best regards

Tony

Multimedia 16F84 Beginners PIC Tools.

http://www.picnpoke.com
Email .....picnpokeKILLspamspam.....cdi.com.au

1998\11\11@161915 by John Payson

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|Perhaps you need a smaller cap on the PIC side of the reg, or a 'load
|resistor to bleed off the charge on power down. Not a very good solution
|for power miser circuits though.

I have seen a number of consumer electronic devices that used
a SPDT switch on the power supply that, when switched off,
would short the load to ground.  Although this will waste some
power if the device is switched on and off rapidly (since all
the energy in the bypass/storage caps will be wasted each time)
it adds nothing to the power draw of the device if it's left on
or off.


'MCLR'
2000\02\05@141719 by Peter Schultz
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part 0 16 bytes
</x-html>

2000\02\05@155831 by Andrew Warren

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Peter Schultz <EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU> wrote:

> Can someone tell me what is the I/O lines state while the device (
> PIC16C63A ) MCLR pin kept low. I mean they are floating or
> something else ?

Peter:

They're floating.

-Andy


=== Andrew Warren - fastfwdspamspam_OUTix.netcom.com
=== Fast Forward Engineering - Vista, California
=== http://www.geocities.com/SiliconValley/2499
===
=== The reports of my demise have been greatly exaggerated.

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