'Low power issues.'
At 04:34 25/06/97 +1000, Ray Gardiner wrote:
>Doubling the clock frequency doesn't double the current.
>Does anyone have any ideas why this is so?
Somebody already mentioned an exponential effect, but there probably is
also some static consumption (like in resistive loads), which doesn't
change at all with frequency, and therefore makes the increase lower than
Gerhard Fiedler <pobox.com> gerhard
S‹o Paulo - Brazil
How about using the RC ossilator. Connect two resistors between the
RC-junction and two of the PIC IO pins. By switching between HIGH out
and input on these two pins, four effective clock speeds should be
Tjaart van der Walt
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In message <puli.cisco.com>, William Chops CMM.0.90.2.867187756.billw
Westfield <CISCO.COM> writes billw
>The cleverest thing I heard of power-consumption wise was on an 1802 circuit
>running from eprom. The 1802 consumed negligible power, but the eprom was
>pretty hungry unless it was disabled. The 1802 had 16 clock (?)
How about the avuncular Clive Sinclair's Executive calculator? The power
was switched on and off constantly, with the circuit capacitance keeping
the data intact. I've got one of these, brand new, in the original
packaging. I keep meaning to try it out.
Amateur radio callsign: G1HSM
Email: lfheller.demon.co.uk leonhttp://www.lfheller.demon.co.uk
Tel: +44 (0) 118 947 1424 (home) +44 (0) 1344 385556 (work)
My 2p's worth on low power.
Dont know if it will work but it seems like it might.
Use a 4060 with a RC osc for a long period count and cause the last output to
drive down the osc in pin on the PIC. The reset pin on the 4060 could then be
controled by the PIC to stop it turning off until processing is finished.
Finaly after processing release reset pin on the 4060 to cause an instant osc
stop. The 4060 could be daisy chained if the period was too short. Look at a
4536 in the same mode of opperation this needs a pulse to start it and very
long periods can be timed using it. Beware of manufacturing tolerances on
this device as it can lead to wide timing devations across different chip
manufactures. I have used a 100Nf 1% and 1M0 to give 24 hours on this timer
chip but differences between Motorala and Harris give vast timing
differences. I havent looked up the consumption of the 4536 so the benifits
of turning off the PIC may be outweighed by the consumption of the 4536
It mist be possable cause my 1.99 watch from local petrol station has now
been working for 3 years on the same single battery........
> At 04:34 25/06/97 +1000, Ray Gardiner wrote:
> >Doubling the clock frequency doesn't double the current.
> >Does anyone have any ideas why this is so?
> Somebody already mentioned an exponential effect, but there probably is
> also some static consumption (like in resistive loads), which doesn't
> change at all with frequency, and therefore makes the increase lower than
There are several things that can affect power consumption:
 At zero speed, there will be some static current leakage; this leakage
will probably remain at higher speeds as well.
 At faster clock speeds, the parasitic capacitance at switching nodes will
not be fully charged or discharged; this may result in higher speeds requ-
iring somewhat less than proportionally-increased current (but see #3).
 During each cycle, many signals will spend a certain amount of time at
"intermediate" voltage levels (neither valid-high nor valid-low). In
CMOS devices, intermediate logic levels can cause excessive current draw;
at higher speeds the device will spend more of its time in "no man's land"
and current leakage via this mechanism may increase more than proportion-
ally with clock speed.
 Oscillators can have current-draw requirements that vary in "wierd" ways
depending upon the type of crystal that's used.
Generally, with PICs I find that for normal-ish speeds (4-20MHz) the current
draw increases fairly linearly with speed; while it may not be exactly linear,
it's close enough for many purposes. At slower speeds (e.g. 32KHz) it's best
to simply use the data sheet estimates.
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