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PICList Thread
'Interupts'
1997\05\01@220929 by TONY NIXON 54964

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I am trying to understand what would happen to the program counter
under the following conditions when an interupt occurs.

As I understand, when an interupt occurs, the current instruction is
executed then the Address of the next instruction is placed onto the
stack so that normal program flow can continue after the IRQ has
been serviced.

What if the current instruction is  'ADDWF PCL', as in a jump table.

The program counter word would now become

Hi Byte = Pclath<4:0>    Low Byte = PCL + W.

Does the interupt preserve this as it's return address, or does it
point to the next address as it normally would.

Regards

Tony


Just when I thought I knew it all,
I learned that I didn't.

1997\05\01@222829 by Andrew Warren

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TONY NIXON 54964 <spam_OUTPICLISTTakeThisOuTspamMITVMA.MIT.EDU> wrote:

> What if [an interrupt occurs when] the current instruction is
> 'ADDWF PCL', as in a jump table.
>
> The program counter word would now become
>
> Hi Byte = Pclath<4:0>    Low Byte = PCL + W.
>
> Does the interupt preserve this as it's return address, or does it
> point to the next address as it normally would.

   Tony:

   There's an appnote from Microchip (AN556) that says you need to
   disable interrupts around computed jumps.

   The appnote is WRONG.

   In the situation you describe, everything will work perfectly;
   when the PIC returns from servicing the interrupt, the PC will
   be at the correct location in your lookup table or whatever.

   -Andy

=== Andrew Warren - .....fastfwdKILLspamspam@spam@ix.netcom.com
=== Fast Forward Engineering, Vista, California
=== http://www.geocities.com/SiliconValley/2499

1997\05\02@004732 by Clyde Smith-Stubbs

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Thus spake TONY NIXON 54964 (Anthony.NIXONspamKILLspamENG.MONASH.EDU.AU):

> What if the current instruction is  'ADDWF PCL', as in a jump table.
>
> The program counter word would now become
>
> Hi Byte = Pclath<4:0>    Low Byte = PCL + W.
>
> Does the interupt preserve this as it's return address, or does it
> point to the next address as it normally would.

The ADDWF to the PC will take 2 cycles, rather than the normal
1, and the interrupt will not be taken until the end of the
instruction, by which time the PC (hi and low) has been updated
to point to the new location in the jump table.

If you are asking "can an interrupt at the wrong time screw things
up" the answer is no - providing the interrupt routine properly
saves and restores any resources used, there will be no effect
on the interrupted code other than the time delay, vicious rumours
(and incorrect data sheets) to the contrary notwithstanding.

--
Clyde Smith-Stubbs    | HI-TECH Software,       | Voice: +61 7 3354 2411
.....clydeKILLspamspam.....htsoft.com      | P.O. Box 103, Alderley, | Fax:   +61 7 3354 2422
http://www.htsoft.com | QLD, 4051, AUSTRALIA.   |
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1997\05\02@012023 by TONY NIXON 54964

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Hey Andy, has Microchip ever offered you a job. It wouldn't surprise
me if you and some others on this list know more about these devices than
the engineers who designed them.

Thanks for the help.

On pondering the problem a little more, I guess the same situation
applies if an interupt occurs when a GOTO or a CALL instruction
precedes it.

I can understand it a little more if I assume that the the interupt
occurs in the following way....

1) IRQ is generated.
2) Current instruction is completed.
3) PC is Updated to point to next instruction.
   This would equal either
       i) the address of the next inline instruction
       or an address generated from the current instruction, ie.
       ii) a computed address (ADDWF PCL)
       iii) a goto address
       iv) a call address
4) This address is pushed onto the stack
5) Jump to IRQ routine via 0004h
6) Retfie (Return) and execute from address pulled off stack.

Regards
Tony

1997\05\02@064219 by Andrew Warren

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TONY NIXON 54964 <EraseMEPICLISTspam_OUTspamTakeThisOuTMITVMA.MIT.EDU> wrote:

> Hey Andy, has Microchip ever offered you a job.

   Not one that I wa interested in taking, no.  However, my company
   DOES do a fair amount of consulting work for Microchip.

> It wouldn't surprise me if you and some others on this list know
> more about these devices than the engineers who designed them.

   I don't think so.

> Thanks for the help.
>
> On pondering the problem a little more, I guess the same situation
> applies if an interupt occurs when a GOTO or a CALL instruction
> precedes it.

   Yes, exactly.

{Quote hidden}

   Correct.

   -Andy

=== Andrew Warren - fastfwdspamspam_OUTix.netcom.com
=== Fast Forward Engineering, Vista, California
=== http://www.geocities.com/SiliconValley/2499

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