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PICList Thread
'Interrupts and machine state'
1996\05\03@020404 by Martin J. Maney

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On Thu, 2 May 1996, Andrew Warren wrote:

> Sorry you wasted half a day on this.  An easier way is the
> following, which is on mmy web page and has been in the Microchip
> data books for a couple of years now:

I haven't needed to deal with interrupts yet, but I think I'm going to
want to fairly soon, so I'd like to ask some questions about this
scheme in a more general context.

>     INTW    EQU     [any page-0 register]
>     INTS    EQU     [any page-0 register]
>             ....
>     ; INTERRUPT SERVICE ROUTINE:
>     PUSH    MOVWF   INTW                    ;SAVE THE W-REGISTER.
>             SWAPF   STATUS,W                ;SAVE THE STATUS
>             MOVWF   INTS                    ;REGISTER.
          <interrupt handler runs here>
>     POP     SWAPF   INTS,W                  ;RESTORE THE STATUS
>             MOVWF   STATUS                  ;REGISTER
>             SWAPF   INTW                    ;RESTORE THE
>             SWAPF   INTW,W                  ;W-REGISTER.
>             RETFIE                          ;RETURN AND RE-ENABLE
>                                             ;INTERRUPTS.

Okay, this is pretty simple (although I don't recall noticing that it
isn't necessary to use swapf to transfer the STATUS register until you
helpfully pointed that out).  Now, how does one do this for a PIC where
the register page select actually changes the (general purpose) register
that an instruction addresses?

I've seen the app note (nominally for the 17Cxx chips) that sets up a
data stack, but while I might be able to spare the RAM locations, I
really can't stand to lose FSR.  I can see two complementary approaches,
but before I work them out I thought I'd find out if that would duplicate
work someone has already done - laziness is the way of the programmer,
no?  ;-)

1996\05\03@031417 by Shel Michaels

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In a message dated 96-05-03 02:06:27 EDT, Martin Maney wrote::

{Quote hidden}

Say, Andrew - I may have missed some of this thread since my mailer is
periodically broken, but...
In the 16C74 don't you find it necessary to do the following for the sake of
completeness??  I've marked with "***" the items that may trip unwary users:

1.  Allocate a byte we'll call WAtInt in BOTH *** page 0 and page 1, at the
same page-relative address
2.  movwf WAtInt  ;save interrupted W register - we don't know which page
we're saving in, but we
                          ;  haven't saved the page bit yet, so we can't be
picky
    swapf STATUS, W  ;save STATUS into W, including page bit
    clrb RP0          ;force to page 0, now that the page bit is preserved
in W***
    movwf SwappedStatusAtInt    ;preserve status in temp location in page 0
    ;preserve other commonly used registers here, particularly including FSR
and PCLATH ***

Best regards,
...Shel Michaels
spam_OUTsbmichaelsTakeThisOuTspamaol.com
http://members.aol.com/sbmichaels

1996\05\03@110338 by Andrew Warren

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Martin J. Maney <.....PICLISTKILLspamspam@spam@MITVMA.MIT.EDU> wrote:

{Quote hidden}

Martin:

That one's also on my web page.  It looks like this:

   INTW    EQU     [any page-0 register]
   INTS    EQU     [any page-0 register]
   INTW1   EQU     INTW + 080H

           ....

   ; INTERRUPT SERVICE ROUTINE:

   PUSH    MOVWF   INTW
           MOVF    STATUS,W
           BCF     STATUS,RP0
           MOVWF   INTS
           ; save PCLATH and FSR here.

           ....

   POP     ; restore PCLATH and FSR here.
           MOVF    INTS,W
           MOVWF   STATUS
           SWAPF   INTW
           SWAPF   INTW,W
           RETFIE

-Andy

Andrew Warren - fastfwdspamKILLspamix.netcom.com
Fast Forward Engineering, Vista, California
http://www.geocities.com/SiliconValley/2499

1996\05\03@110344 by Andrew Warren

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Shel Michaels <.....PICLISTKILLspamspam.....MITVMA.MIT.EDU> wrote:

> Say, Andrew - I may have missed some of this thread since my mailer
> is periodically broken, but... In the 16C74 don't you find it
> necessary to do the following for the sake of completeness??

Shel:

Yes, the 16C74 context-saving code is a little more complicated.
However, the original title of this thread was "Interrupts on the
16C84".

-Andy

Andrew Warren - EraseMEfastfwdspam_OUTspamTakeThisOuTix.netcom.com
Fast Forward Engineering, Vista, California
http://www.geocities.com/SiliconValley/2499

1996\05\03@123144 by Martin J. Maney

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On Fri, 3 May 1996, Andrew Warren wrote:

> That one's also on my web page.

I should have thought of that.  What can I say, it was late.  :-)

> It looks like this:

That's scary - aside from the names and use of mixed case, that's exactly
what I just sketched a few minutes ago, after I came across the echo of
my question and decided to reconsider it while fully awake.  I think what
I hadn't been able to see through the late-night fog was that as long as
you know which page the saved status is in you will all but inevitably
get the page bit where W was saved during the "pop" operation.

Looking at the versions on your most excellent web page, I'm now wondering
- why two versions?  As far as I can see, they differ only in that one
saves the STATUS nibble-swapped and the other doesn't, and that in one
you set a known register page select bit before the status is copied out
of W where in the other this is done after.  Assuming that you'll need to
set a known register page anyway (and I can imagine only a very special
case where this wouldn't be needed), there seems to be no reason to have
two different code sequences for the one-page-mapped and two-pages-really
sets of PICs.

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