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'Getting a 16C74 to talk to 2400 series eeproms'
1996\05\24@065709 by Jim Main

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Are there any resources floating about on how to do this?  The 1994 data
book only has a very small paragraph on  using the 16C74 in master mode..

It looks - on first reading - that everything has to be done in s/ware - eg
rotating a register and setting/clearing the TRISC bits to suit.

How do you get the timings right (and provide a clock at the same time)

Are the interrupts (for detection of start and stop bits) only of use when
receiving data back from the eeprom (and do you have to disable them for
when the master is talking to the slave??)

You'd think Microchip would give some worked examples!

Jim

1996\05\24@074600 by Andy David

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Jim,

a source of app notes is Microchips Embedded Control Systems book.
I suppose it's like any app note book in that you'll probably have to
pick various bits and pieces from a handful of app notes to get all that
you need. You can download these app notes from Microchip's
web site in .PDF format, there's likely to be a link to somewhere
where you can download the acrobat .PDF reader as well. I think
Microchip's web site is pretty good, actually, the app notes I've used
I have both in .PDF and book form.
I have some code (written for a 73) which communicates with a
nm93c86 EEPROM using the SPI port, although I've not used
interrupts, so as I wasn't doing anything particularly nasty (the pic
is always the spi bus master on my system) it wasn't difficult to
write. I referenced App note AN613.


- Andy.

1996\05\24@075846 by Richard G. Thomas

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>
> Are there any resources floating about on how to do this?  The 1994 data
> book only has a very small paragraph on  using the 16C74 in master mode..
>
> It looks - on first reading - that everything has to be done in s/ware - eg
> rotating a register and setting/clearing the TRISC bits to suit.
>
> How do you get the timings right (and provide a clock at the same time)
>
> Are the interrupts (for detection of start and stop bits) only of use when
> receiving data back from the eeprom (and do you have to disable them for
> when the master is talking to the slave??)
>
> You'd think Microchip would give some worked examples!

I think this has been discussed before and master mode doesn't work, but
sofware method (see AN567) works well.

Can anyone tell us why master mode doesn't work or was it some sort of
legel/copyright thing that prevented it being implemented.

Does the hardware work in slave mode? If so does anyone have any example
code?

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1996\05\24@154630 by fastfwd

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Jim Main <.....PICLISTKILLspamspam@spam@MITVMA.MIT.EDU> wrote:

> Are there any resources floating about on how to do this?  The 1994
> data book only has a very small paragraph on  using the 16C74 in
> master mode..
>
> It looks - on first reading - that everything has to be done in
> s/ware - eg rotating a register and setting/clearing the TRISC bits
> to suit.
>
> How do you get the timings right (and provide a clock at the same
> time)
>
> Are the interrupts (for detection of start and stop bits) only of
> use when receiving data back from the eeprom (and do you have to
> disable them for when the master is talking to the slave??)
>
> You'd think Microchip would give some worked examples!

Jim:

They do give examples; you're just looking in the wrong place. Look
in Microchip's "Embedded Control Handbook".

"Getting the timings right" is not an issue; there are no constraints
on the minimum speed of the data transfer, and there's no requirement
for clock pulses to be regularly-spaced.

The interrupts only work when the PIC is operating in slave mode;
they don't help you at all when you're using the PIC in master mode.

-Andy

Andrew Warren - fastfwdspamKILLspamix.netcom.com
Fast Forward Engineering, Vista, California
http://www.geocities.com/SiliconValley/2499

1996\05\26@162050 by fastfwd
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Jim Main <.....jmainKILLspamspam.....cqm.co.uk> wrote:

> > [Quoting me:]
> > The interrupts only work when the PIC is operating in slave mode;
> > they don't help you at all when you're using the PIC in master
> > mode.
>
> Ha-Harrr! but the 1994 data book (page 2-456) says that "Master mode
> is supported by interrupt generation on the detection of the START
> and STOP conditions.  <cut>
>
> ..so I thought interrupts might be involved somehow..

   Sorry, Jim; my mistake.  I forgot about the Start/Stop Detection
   interrupt flags.

   They don't strike me as being particularly useful, though... Has
   anyone on the list ever saved time or trouble using this
   hardware "support" in a single-Master system?

   -Andy

Andrew Warren - EraseMEfastfwdspam_OUTspamTakeThisOuTix.netcom.com
Fast Forward Engineering, Vista, California
http://www.geocities.com/SiliconValley/2499

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